NI Labs Discussions

cancel
Showing results for 
Search instead for 
Did you mean: 

IIR Butterworth filter implementaion in labview fpga

hi,

I am trying to create a fixed point IIT butterworth filter in labview fpga.

i create two sine tones, filter them using IIT floating point filter.

then, i quantize the filter using FXP model and simulate it using FXP simulation.all looks well.

then i use FXP code genrator , which automatically genrates filter for me.

when i open the FPGA VI, filter has i/p and o/p as fixed point scaler, with inputs like data valid etc.

i have following questions

1) do i need to create FIFO to pass data to FPGA VI, and then read back filtered result.

2) Do i need to handle handshake signals?

3) I have 512 point i/p, so, sld i give 512 samples to FPGA VI, before i get a valid o/p.

I am getting zero o/p, i don't know why.

thnks

sidharth

0 Kudos
Message 1 of 2
(8,659 Views)

This is really a support question which should not be placed in NILabs. Rather you should use our discussion forums, which are constantly monitored and answered by the community and our internal team of Application Engineers.

The quick answers to your questions are most likely, yes, and yes.

0 Kudos
Message 2 of 2
(2,913 Views)