Notes on transfer from OrCAD Capture CIS 16.0.0.p001 to Ultiboard 10.1.197
In Orcad, create netlist, pick tab other, formatter: calay.dll
The output is 2 files: *.net and *.cmp
If feasible, in Orcad, renumber reference designations before starting
Print out the *.net and the *.cmp files.
In Ultiboard, File->New Design
In Ultiboard, File->Open…
Pick Files of Type: Calay Netlist Files (*.net)
Open the *.net file
In Ultiboard, in spreadsheet view, pick parts tab. Print using the spreadsheet view print icon. Compare with the *.cmp file printed above. Insure that all the parts and reference designations are there! (The reading of the *.net and *.cmp file doe not always report it could not find / match a footprint.)
Ultiboard expects electrolytic capacitor pin names + and -. Orcad and Calay format uses 1 and 2. In Ultiboard, make a new properly sized electrolytic capacitor footprint but with pin names 1 and 2.
Ultiboard expects diode pin names C and A (for Cathode and Anode). In Ultiboard, make a new properly sized diode footprint with pins named 1 and 2.
And so on.
One has to be careful the parts with changed pin names do not conflict with future Multisim / Ultiboard transfers. Use unique names!
For uncommon parts, compare the expected pin locations with the original schematic and the part’s data sheet.
Go over the *.net file. For example, the /GND (digital ground) and /AGND (analog ground) nets, even if connected on the schematic, are separate nets in the netlist.
There is a “net bridge” in Ultiboard to connect nets, but look in the forums for more information on using it.
Since this answer is quite old I would like to get the response refreshed.
I need to import a netlist from a recent version ORCAD schematic to Ultiboard 14.1.
Is Calay still the preferred ORCAD export format?
I was able to import the calay64 netlist, though no parts came in. I would have thought any part without a matching footprint would come is as a 'no footprint' symbol, but no parts came in, even those that had matching footprints. When I added a few parts manually I found there are netlist errors. i.e. I have a resistor with one pin listed in two different nets, even though the input calay netlist is correct and does have that extra false connection.
It also looks like I can't import a revised netlist into an existing design. Each new import results in a new design opening instead.