Ultiboard: Trace laying automatically adds vias that often violate DRC. Unwanted vias automatically added in pads.

[spoof]

Using 'Follow Me' will add unwanted vias, especially if there is a plane below of the same net as the trace being laid. These vias can also be placed within pads which causes assembly problems.

Is there a way to turn automatic vias off?

[VA.KI]

Hello spoof,

There is no option to turn off automatic vias.

I have few questions.

Which version of Ultiboard do you use?

Have you notice this behavior in past or it is first time you are using this function?

Are the settings set right and if you face same issue when you use the function for other project?

I haven't found similar issue anywhere else, or in the "Ultiboard User Manual".

Could you please share some screenshots (schematic, PCB settings etc.)?

Additionally, re-installation of the program may help