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Multisim and Ultiboard

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Ultiboard 14.0 : the gerber file is corrupted

Hi,

 

I actually create a PCB with Multisim and Ultiboard 14.0, and I have some problems with the gerber file resulting of my PCB design. My design is full of parasites circles at intersections, this following photo is a screenshot of my problem:

 

Capture.PNG

 

My final goal is to import this gerber file into CopperCam to convert it as a G-code ISO file (to use with Mach3). The problem is: when I open this file with CopperCam, The software detects all the parasites circles and doesn't understand anything.

 

Does anybody can help me with this problem, or advise me to convert my Ultiboard file to a G-code file?

 

 

Thanks a lot.

 

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Hi icamge5,

 

These looks like DRC error markers, but I'm unsure why the appear to be on a copper layer. Can you attach the design you created the Gerber from so we can take a closer look?

 

Thanks,

 

Jeff

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Hi Jeff,

 

Thanks a lot for the answer. An example of the initial design (matching with the first picture but in reflection) is the following:

 

Capture.PNG

 

As we can see, there is no error marker on the original design... That's why I don't understand why there are errors on the gerber file.

 

Do you have any idea why I have this problem?

 

Thanks again,

 

Nicolas

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Hi Nicolas,

 

The picture you attached looks fine, I can't see any problems there. Could you attach your Ultiboard design file? Or at least a test file that has the same problem? Maybe there is something there that we can't see from just the picture.

 

Thanks,

 

Jeff

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Hi Jeff, 

 

Here's my entire file on ultiboard v14: 

http://jmp.sh/xK9HplP

 

Thanks for the support and have a nice day

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Hi Nicolas, 

 

It seems this is a defect in Ultiboard's Gerber export when using the reflection option. I've talked to the R&D team about it and they are investigating a fix. In the meantime the workaround would be to not use the reflection option, but I understand this is a big inconvenience. 

 

Jeff

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Hi Nicolas, 

 

I just wanted to let you know that the R&D team has implemented a fix for this issue and it will be available in our next release (Circuit Design Suite 14.0.1), which will be available early next year. 

 

Cheers,

 

Jeff

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