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Multisim and Ultiboard

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Simulation Error

Dear all,

any idea why DC simulation of the attached circuit (shown below) does not converge?

The circuit is very simple, I think I'm missing something silly...

Thank you!

Best,

Paolo

--

 

 

Circuit

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Message 1 of 6
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Hi,

U1 seems to be connected in open loop.... so out will saturate.

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Message 2 of 6
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Hi,

U1 is an instrumentation amplifier (INA); RGAIN1 sets the gain. Here, the gain is around 50.

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Message 3 of 6
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hi
... Now the circuit is simulated ..

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Message 4 of 6
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Hi vlad3156,

thank you for the reply.

TRAN simulation always worked.

It is the DC one (hence the AC) that does not work.

And it does not work in your testbench, as well. Screenshot attached.

 

------ Checking SPICE netlist for adc_1 - martedì 10 gennaio 2017, 10:51:37 ------
======= SPICE Netlist check completed, 0 error(s), 0 warning(s) =======
DC operating point calculation did not converge
Simulation canceled
See convergence help for more information

 

 

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Message 5 of 6
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hi ..
everything works .... just need to do it right.
What is the frequency response .. ??? is the logarithm of the relationship of stress in function of frequency.
in your case is the ratio of the output voltage and input ... ie. 20 * log (V (9) / V (6))
20 * log () Multisim computes itself, if you put a check box "decibel", and the expression V (9) / V (6) need to enter yourself.
Here V (9) and V (6) of the output voltage and input.
the chart will get some pictures that show the frequency response
series-connected stages ...

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Message 6 of 6
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