I am for the firs time designing a 3 layer RF PCB (top, inner, bottom).
The PCB is actually a sample holder and there will be a cut out in the centre where we will place a chip which will later be bonded.
The problem is that there is also "mezzanine": the cut-out of the top PCB will be bigger than that of bottom PCB; this will expose and allow us to bond from the internal layer as well as the top layer (the chip/sample has lots of pads, so we need to bond from two levels).
This is obviously non-standard which is causing me all sorts of problem with Ultiboard (btw, the company that will fabricate the PCB can do this; it will just be expensive...).
In the past I've always created bond-pads by designing a "component" with SMD pads in the right place. This makes it easy to route the traces etc in the usual way.
My problem/question now is that I now would like to place a component (my bond pads) on the INNER layer but Ultiboard won't allow me to do so. Is there a workaround?
SMD Fanouts and THT components (with zero size pads on top and bottom layers) should work, but then I would end up with holes which I obviously don' want.
Any ideas?
