Multisim and Ultiboard

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Incorrect netlist after forward annotate

I'm trying to create a PCB for a simple digital clock using the chips we teach in class. I have been having numerous problems with forward annotating when I make a change on the schematic.I think some of them were caused by Ultiboard automatically swapping gates. Some of them were fixed by tediously deleting and reconnecting the parts in Multisim and forward annotating.

 

I haven't been able to fix my current issue. U10's nets are not being correctly transferred to Ultiboard. See below for side-by-sides. Pin on of U10 should be connected to net 9 and is in Multisim. In Ultiboard it isn't. Forward annotating detects no differences.

ebumbalough2_2-1574801503752.png

 

Education Edition Version 14.1

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