Help importing SPICE model for OPA1678 - fixed the .subckt error but still doesn't sim?

[catsandelectrons]

Greetings!

I am having trouble understanding how to properly import this SPICE model obtained from TI's website for the OPA1678 opamp.

At first I had what seems to be the common "multiple top .subskt statements" error, and moved the .ends OPA1678 statement to the bottom of the model file. This allowed me to create the MultiSim model correctly, and place it in schematics.

However, it seems to throw errors whenever it is used in common circuits that work with the OPAMP_3T_VIRTUAL component, so I gather that perhaps something else is amiss.

Would anyone with more knowledge of SPICE model syntax be able to help me out here? Thanks in advance for any help!

Below is the model as I have it. Here is where I obtained the model code from TI: http://www.ti.com/product/OPA1678/toolssoftware

* OPA1678 - Rev. C
* Created by Ian Williams; March 02, 2018
* Created with Green-Williams-Lis Op Amp Macro-model Architecture
* Copyright 2018 by Texas Instruments Corporation
******************************************************
* MACRO-MODEL SIMULATED PARAMETERS:
******************************************************
* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY  WITH RL, CL EFFECTS (Aol)
* UNITY GAIN BANDWIDTH (GBW)
* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)
* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)
* DIFFERENTIAL INPUT IMPEDANCE (Zid)
* COMMON-MODE INPUT IMPEDANCE (Zic)
* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)
* OUTPUT CURRENT THROUGH THE SUPPLY (Iout)
* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)
* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)
* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)
* SHORT-CIRCUIT OUTPUT CURRENT (Isc)
* QUIESCENT CURRENT (Iq)
* SETTLING TIME VS. CAPACITIVE LOAD (ts)
* SLEW RATE (SR)
* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD
* LARGE SIGNAL RESPONSE
* OVERLOAD RECOVERY TIME (tor)
* INPUT BIAS CURRENT (Ib)
* INPUT OFFSET CURRENT (Ios)
* INPUT OFFSET VOLTAGE (Vos)
* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm)
* INPUT/OUTPUT ESD CELLS (ESDin, ESDout)
******************************************************
.SUBCKT OPA1678 IN+ IN- VCC VEE OUT
******************************************************
* MODEL DEFINITIONS:
.model BB_SW VSWITCH(Ron=50 Roff=1e12 Von=700e-3 Voff=650e-3)
.model ESD_SW VSWITCH(Ron=50 Roff=1e12 Von=500e-3 Voff=450e-3)
.model OL_SW VSWITCH(Ron=1e-3 Roff=1e9 Von=900e-3 Voff=800e-3)
.model OR_SW VSWITCH(Ron=10e-3 Roff=1e9 Von=10e-3 Voff=0)
.model R_NOISELESS RES(T_ABS=-273.15)
******************************************************
V_OS N032 N044 496.4e-6
R1 N036 N033 R_NOISELESS 1e-3 
R2 N053 ESDn R_NOISELESS 1e-3 
R3 N076 0 R_NOISELESS 1e12 
C1 N076 0 1
R4 VCC_B N075 R_NOISELESS 1e-3 
C2 N075 0 1e-15
C3 N077 0 1e-15
R5 N077 VEE_B R_NOISELESS 1e-3 
G1 N036 N037 N005 N004 1e-3
R6 MID N049 R_NOISELESS 1e12 
VCM_MIN N052 VEE_B 0.5
R7 N052 MID R_NOISELESS 1e12 
VCM_MAX N049 VCC_B -2
XVCM_CLAMP N037 MID N045 MID N049 N052 VCCS_EXT_LIM
R8 N045 MID R_NOISELESS 1 
C4 N046 MID 1e-15
R9 N045 N046 R_NOISELESS 1e-3 
V4 N073 OUT 0
R10 MID N059 R_NOISELESS 1e12 
R11 MID N060 R_NOISELESS 1e12 
XIQp VIMON MID VCC MID VCCS_LIM_IQ
XIQn MID VIMON MID VEE VCCS_LIM_IQ
R12 VCC_B N009 R_NOISELESS 1e3 
R13 N022 VEE_B R_NOISELESS 1e3 
XCLAWp VIMON MID N009 VCC_B VCCS_LIM_CLAWp
XCLAWn MID VIMON VEE_B N022 VCCS_LIM_CLAWn
R14 VEE_CLP MID R_NOISELESS 1e3 
R15 MID VCC_CLP R_NOISELESS 1e3 
R16 N010 N009 R_NOISELESS 1e-3 
R17 N023 N022 R_NOISELESS 1e-3 
C5 MID N010 1e-15
C6 N023 MID 1e-15
R18 VOUT_S N060 R_NOISELESS 100 
C7 VOUT_S MID 1e-12
G2 MID VCC_CLP N010 MID 1e-3
G3 MID VEE_CLP N023 MID 1e-3
XCL_AMP N007 N034 VIMON MID N013 N020 CLAMP_AMP_LO
V_ISCp N007 MID 50
V_ISCn N034 MID -37
XOL_SENSE MID N042 N041 N051 OL_SENSE
R19 N034 MID R_NOISELESS 1e12 
R20 N020 MID R_NOISELESS 1 
C8 N021 MID 1e-15
R21 MID N013 R_NOISELESS 1 
R22 MID N007 R_NOISELESS 1e12 
C9 MID N014 1e-15
XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID N011 N018 CLAMP_AMP_LO
R23 VEE_CLP MID R_NOISELESS 1e12 
R24 N018 MID R_NOISELESS 1 
C10 N019 MID 1e-15
R25 MID N011 R_NOISELESS 1 
R26 MID VCC_CLP R_NOISELESS 1e12 
C11 MID N012 1e-15
XCL_SRC N014 N021 CL_CLAMP MID VCCS_LIM_4
XCLAW_SRC N012 N019 CLAW_CLAMP MID VCCS_LIM_3
R27 N011 N012 R_NOISELESS 1e-3 
R28 N019 N018 R_NOISELESS 1e-3 
R29 N013 N014 R_NOISELESS 1e-3 
R30 N021 N020 R_NOISELESS 1e-3 
R31 N042 MID R_NOISELESS 1 
R32 N042 SW_OL R_NOISELESS 100 
C12 SW_OL MID 1e-9
R33 VIMON N059 R_NOISELESS 100 
C13 VIMON MID 1e-12
C_DIFF ESDp ESDn 6e-12
C_CMn ESDn MID 2e-12
C_CMp MID ESDp 2e-12
I_Q VCC VEE 2e-3
I_B N032 MID 10e-12
I_OS ESDn MID 1e-15
R34 IN+ ESDp R_NOISELESS 250 
R35 IN- ESDn R_NOISELESS 250 
R36 N024 MID R_NOISELESS 1 
R37 N035 MID R_NOISELESS 1e12 
R38 MID N016 R_NOISELESS 1 
R39 MID N008 R_NOISELESS 1e12 
XGR_AMP N008 N035 N015 MID N016 N024 CLAMP_AMP_HI
XGR_SRC N017 N025 CLAMP MID VCCS_LIM_GR
C17 MID N017 1e-15
C18 N025 MID 1e-15
V_GRn N035 MID -113
V_GRp N008 MID 113
R40 N016 N017 R_NOISELESS 1e-3 
R41 N025 N024 R_NOISELESS 1e-3 
R42 VSENSE N015 R_NOISELESS 1e-3 
C19 MID N015 1e-15
R43 MID VSENSE R_NOISELESS 1e3 
G5 N032 N033 N002 MID 1e-3
G8 MID CLAW_CLAMP N071 MID 1e-3
R45 MID CLAW_CLAMP R_NOISELESS 1e3 
R47 N063 VCLP R_NOISELESS 100 
C24 MID VCLP 1e-12
E4 N063 MID CL_CLAMP MID 1
E5 N060 MID OUT MID 1
H1 N059 MID V4 1e3
S1 N062 N061 SW_OL MID OL_SW
R52 MID ESDp R_NOISELESS 1e12 
R53 ESDn MID R_NOISELESS 1e12 
R58 N033 N032 R_NOISELESS 1e3 
R59 N075 N076 R_NOISELESS 1e6 
R60 N076 N077 R_NOISELESS 1e6 
R67 N037 N036 R_NOISELESS 1e3 
G15 MID VSENSE CLAMP MID 1e-3
V_ORp N031 VCLP 8.8
V_ORn N026 VCLP -8.8
V11 N028 N027 0
V12 N029 N030 0
H3 N040 MID V12 10
S6 VCC OUT OUT VCC ESD_SW
S7 OUT VEE VEE OUT ESD_SW
E1 N068 0 N076 0 1
S8 N029 CLAMP CLAMP N029 OR_SW
S9 CLAMP N028 N028 CLAMP OR_SW
Xi_nn ESDn MID FEMT
Xi_np N044 MID FEMT
XVCCS_LIMIT_1 N046 N053 MID N047 VCCS_LIM_1
XVCCS_LIMIT_2 N047 MID MID CLAMP VCCS_LIM_2
R44 N047 MID R_NOISELESS 1e6 
R68 CLAMP MID R_NOISELESS 1e6 
H2 N050 MID V11 -10
Xe_n N044 N043 VNSE
R51 N043 ESDp R_NOISELESS 1e-3 
R71 N041 N040 R_NOISELESS 100 
R72 N051 N050 R_NOISELESS 100 
C27 N041 MID 1e-12
C28 N051 MID 1e-12
XVCCS_LIM_ZO N067 MID MID N072 VCCS_LIM_ZO
Rdc3 N038 MID R_NOISELESS 1 
R92 N038 N039 R_NOISELESS 1e4 
R93 N039 MID R_NOISELESS 8918.92 
G24 MID N048 N039 MID 2.1212
C33 N039 N038 9.646e-13
R94 N048 MID R_NOISELESS 1 
G25 MID N038 VSENSE MID 1
C36 CLAMP MID 3.98e-8
G4 MID CL_CLAMP CLAW_CLAMP MID 1e-3
R62 MID CL_CLAMP R_NOISELESS 1e3 
R46 N002 MID R_NOISELESS 2e3 
R48 N002 N001 R_NOISELESS 1e8 
G9 MID N001 ESDp MID 20e-3
Rsrc2 N001 MID R_NOISELESS 1 
C16 N002 N001 6.366e-12
C21 N004 N003 3.98e-10
R49 N004 MID R_NOISELESS 22.86 
R50 N004 N003 R_NOISELESS 1e8 
G10 MID N003 VEE_B MID 0.4375
Rsrc4 N003 MID R_NOISELESS 1 
C14 N005 N006 3.98e-10
R54 N005 MID R_NOISELESS 22.86 
R55 N005 N006 R_NOISELESS 1e8 
G6 MID N006 VCC_B MID 0.4375
Rsrc1 N006 MID R_NOISELESS 1 
Rx N073 N072 R_NOISELESS 1.45e5 
Rdummy N073 MID R_NOISELESS 1.45e4 
G11 MID N061 CL_CLAMP N073 88.5
Rdc1 N061 MID R_NOISELESS 1 
R56 N061 N062 R_NOISELESS 1e8 
R57 N062 MID R_NOISELESS 2.83e6 
G12 MID N064 N062 MID 36.39
C15 N062 N061 2.14e-10
R61 N064 MID R_NOISELESS 1 
R63 N064 N065 R_NOISELESS 9e8 
R64 N065 N074 R_NOISELESS 1e8 
C23 MID N074 3.18e-18
Gb2 MID N066 N065 MID 1
R65 N066 MID R_NOISELESS 1 
R66 N066 N067 R_NOISELESS 1e8 
R70 N067 MID R_NOISELESS 502.5e3 
C25 N067 N066 3.18e-18
R73 N072 MID R_NOISELESS 1 
G13 MID N027 N026 MID 1
G14 MID N030 N031 MID 1
R74 MID N027 R_NOISELESS 1 
R75 MID N030 R_NOISELESS 1 
S2 VCC ESDn ESDn VCC ESD_SW
S3 VCC ESDp ESDp VCC ESD_SW
S4 ESDn VEE VEE ESDn ESD_SW
S5 ESDp VEE VEE ESDp ESD_SW
S10 ESDp ESDn ESDn ESDp BB_SW
S11 ESDn ESDp ESDp ESDn BB_SW
G16 0 VCC_B VCC 0 1
G17 0 VEE_B VEE 0 1
R76 VCC_B 0 R_NOISELESS 1 
R77 VEE_B 0 R_NOISELESS 1 
RMID N068 MID R_NOISELESS 1e-2
R82 N054 MID R_NOISELESS 1e6
C22 N054 MID 2.15e-16
G20 MID N054 N048 MID 1e-6
R83 N055 MID R_NOISELESS 1e6
C31 N055 MID 2.15e-16
G21 MID N055 N054 MID 1e-6
R84 N056 MID R_NOISELESS 1e6
C32 N056 MID 2.15e-16
G22 MID N056 N055 MID 1e-6
R88 N057 MID R_NOISELESS 1e6
C35 N057 MID 2.15e-16
G26 MID N057 N056 MID 1e-6
R89 N058 MID R_NOISELESS 1e6
C37 N058 MID 2.15e-16
G27 MID N058 N057 MID 1e-6
R90 N069 MID R_NOISELESS 1e6
C38 N069 MID 1.06e-16
G28 MID N069 N058 MID 1e-6
R91 N070 MID R_NOISELESS 1e6
C39 N070 MID 1.06e-16
G29 MID N070 N069 MID 1e-6
R95 N071 MID R_NOISELESS 1e6
C40 N071 MID 1.06e-16
G30 MID N071 N070 MID 1e-6
*
.subckt CLAMP_AMP_HI VC+ VC- VIN COM VO+ VO-
.param G=10
GVo+ COM Vo+ Value = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVo- COM Vo- Value = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ends CLAMP_AMP_HI
*
.subckt OL_SENSE 1   2  3  4
GSW+ 1 2 Value = {IF((V(3,1)>10e-3 | V(4,1)>10e-3),1,0)}
.ends OL_SENSE
*
.subckt VCCS_EXT_LIM VIN+ VIN- IOUT- IOUT+ VP+ VP-
.param Gain = 1
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
.ends VCCS_EXT_LIM
*
.subckt VCCS_LIM_3 VC+ VC- IOUT+ IOUT-
.param Gain = 1
.param Ipos = 0.226
.param Ineg = -0.226
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_3
*
.subckt VCCS_LIM_4 VC+ VC- IOUT+ IOUT-
.param Gain = 1
.param Ipos = 0.452
.param Ineg = -0.452
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_4
*
.subckt VCCS_LIM_CLAWp VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {abs(V(VC+,VC-))} =
+(0, 5e-5)
+(10, 6.9e-4)
+(30, 2.22e-3)
+(48, 3.93e-3)
+(49.6, 7.2e-3)
+(50.4, 1.8e-2)
.ends VCCS_LIM_CLAWp
*
.subckt VCCS_LIM_CLAWn VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {abs(V(VC+,VC-))} =
+(0, 5e-5)
+(35.2, 3.41e-3)
+(36.8, 5.2e-3)
+(38, 1.8e-2)
.ends VCCS_LIM_CLAWn
*
.subckt VCCS_LIM_IQ VC+ VC- IOUT+ IOUT-
.param Gain = 1e-3
G1 IOUT+ IOUT- VALUE={IF( (V(VC+,VC-)<=0),0,Gain*V(VC+,VC-) )}
.ends VCCS_LIM_IQ
*
.subckt VNSE 1 2
.param FLW=1
.param GLF=0.1048
.param RNV=18.0086
.model DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
.ends VNSE
*
.subckt CLAMP_AMP_LO VC+ VC- VIN COM VO+ VO-
.param G=1
GVo+ COM Vo+ Value = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVo- COM Vo- Value = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ends CLAMP_AMP_LO
*
.subckt VCCS_LIM_GR VC+ VC- IOUT+ IOUT-
.param Gain = 1
.param Ipos = 0.326
.param Ineg = -0.326
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_GR
*
.subckt VCCS_LIM_1 VC+ VC- IOUT+ IOUT-
.param Gain = 1e-4
.param Ipos = .5
.param Ineg = -.5
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_1
*
.subckt VCCS_LIM_2 VC+ VC- IOUT+ IOUT-
.param Gain = 0.04558
.param Ipos = 0.358
.param Ineg = -0.358
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_2
*
.subckt VCCS_LIM_ZO VC+ VC- IOUT+ IOUT-
.param Gain = 200
.param Ipos = 14.5e3
.param Ineg = -14.5e3
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_ZO
*
.subckt FEMT 1 2
.param FLWF=1e-3
.param NLFF=3
.param NVRF=3
.param GLFF={PWR(FLWF,0.25)*NLFF/1164}
.param RNVF={1.184*PWR(NVRF,2)}
.model DVNF D KF={PWR(FLWF,0.5)/1e11} IS=1.0e-16
I1 0 7 10e-3
I2 0 8 10e-3
D1 7 0 DVNF
D2 8 0 DVNF
E1 3 6 7 8 {GLFF}
R1 3 0 1e9
R2 3 0 1e9
R3 3 6 1e9
E2 6 4 5 0 10
R4 5 0 {RNVF}
R5 5 0 {RNVF}
R6 3 4 1e9
R7 4 0 1e9
G1 1 2 3 4 1e-6
.ends FEMT
.ends OPA1678
*