First, I am aware of all the caveats on home made models. That isn't the issue. I attempted to translate a homemade version of the LM334 done in LTSpice by a guru. While I managed to get a component without netlist errors, I get no output so it isn't very useful (yet). Would anyone like to take a stab at this? (Tried to get a hold of lacie / kittmaster but can never get into that guys db.....)
Here is the original LTSPice:
* Selfmade model of the LM334 from National Semiconductor or ST
* Helmut Sennewald
*
* Pin order: v+ v- R
.SUBCKT LM334 v+ v- R
Q4 N002 N001 v+ 0 pnp1
Q5 N003 N001 v+ 0 pnp1
Q6 R N001 v+ 0 pnp1 16
Q1 N003 N003 R 0 npn1 12
Q2 N002 N003 N004 0 npn1
Q3 N001 N002 R 0 npn1
C1 N002 N004 50p
R2 N004 v- 1µ
R8 v+ v- 1G
C2 v+ v- 10p
C3 N003 v- 1p
C4 R v- 1p
.model npn1 NPN(Is=1e-15 BF=200 TF=1e-9 Cjc=0.5e-12 Cje=1e-12 VAF=100 Rb=100 Re=5)
.model pnp1 PNP(Is=1e-15 BF=100 TF=1e-7 Cjc=0.5e-12 Cje=1e-12 VAF=100 Rb=100 Re=5)
.ENDS
I tried verisons with and without the trailing zeros in the transistor defs and with and without the 16 and 12 following Q6 & Q1 as I was unsure of their effect. This is what I last tried. (Symbol & device mapping are V+ V- R all synchronized)
.SUBCKT LM334 v+ v- R
Q4 N002 N001 v+ qp1
Q5 N003 N001 v+ qp1
Q6 R N001 v+ qp1
Q1 N003 N003 R qn1
Q2 N002 N003 N004 qn1
Q3 N001 N002 R qn1
C1 N002 N004 50p
R2 N004 v- 1µ
R8 v+ v- 1G
C2 v+ v- 10p
C3 N003 v- 1p
C4 R v- 1p
.model qn1 NPN(Is=1e-15 BF=200 TF=1e-9 Cjc=0.5e-12 Cje=1e-12 VAF=100 Rb=100 Re=5)
.model qp1 PNP(Is=1e-15 BF=100 TF=1e-7 Cjc=0.5e-12 Cje=1e-12 VAF=100 Rb=100 Re=5)
.ENDS
I have a doc file with the LM334 schematic marked up for node numbering and the additional parts added into the model "circuit" by Helmut....
What did I miss?
