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Hi, my question is to design a circuit simulating DRAM operation that shows a retention time of 2 10-5 s and to estimate read/write time.
My current circuit is attached (not sure if it is correct). I also attached the oscilloscope graph, but I have no idea what that is showing me.
Can someone please let me know if that is the right circuit for that problem, and how I can go about to find the retention time, and to estimate read/write time.