Multisim and Ultiboard Idea Exchange

Community Browser
About Multisim and Ultiboard Idea Exchange
Do you have an idea for how to improve Multisim and Ultiboard? Submit and vote on ideas now!

  1. Browse by label or search in the Multisim and Ultiboard Idea Exchange to see if your idea has previously been submitted. If it has, be sure to vote for the idea by giving it kudos to indicate your approval!
  2. If your idea has not been submitted click the New Idea button to submit a product idea. Be sure to submit a separate post for each idea.
  3. Watch as the community gives your idea kudos and adds their input.
  4. As NI R&D considers the idea, they will change its status.
  5. Give kudos to other ideas that you would like to see in a future version of Multisim!

The Multisim and Ultiboard R&D team is committed to reviewing every idea submitted via the Multisim and Ultiboard Idea Exchange. However, we cannot guarantee the implementation of any Multisim & Ultiboard Idea Exchange submission.

cancel
Showing results for 
Search instead for 
Did you mean: 
Post an idea
0 Kudos

The Idea: It would be nice to be able to set a desired sampling rate for a transient simulation before starting the simulation.

 

Background: We need to run longish transient simulations with a reasonably small TMAX. But we don't need all the intermediate time points used solely for helping the integration to converge. Multisim claims to run out of memory after occupying somewhere around 1 GB of memory, sometimes less. This is not a OS or hardware limit, but something intrinsic to Multisim's memory handling. This behavior is more bug-like than a real limitation of the software.

 

The capability for resampling/interpolating is already available through the export to .lvm files (see attached figure). Although I think the memory handling issue should be solved separately, allowing Multisim to discard irrelevant time-points on the fly would spare precious memory during more demanding simulations.

0 Kudos

Dear Sir or Madam!

It would be great if there were provide support of Darlingon transitors in the next release of Multisim Online

Thank you!

0 Kudos

When a new version is released and installed it resets all configs, preferred paths, libraries, etc. to defaults.

 

It would be far more friendly to inherent the settings from the previously installed version instead of doing this.  Almost all other app updates I get seem to be able to do this with no problem.

 

 New versions (last 14.1) can't even load the configs from the previous version, so it's left to the user to re-create them from scratch.

 

 

0 Kudos

Add some basic Digital Logic gates and interactive digital constants to the simulator. Just basic 2 and 3-input gates would be great.

0 Kudos

3. Schematic: To add active probe (see CircuitMaker 2000 solution).

 

With the 14 version release there are probes feature added that I did not have a chance to evalute however probe can be moved dynamically to the specific net to check a signal level (voltage or current) or when you place on a component so power dissipation can be measured and showed (power dissipation vs time).

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

17. Simulation: To add Worst Case option to Monte Carlo analysis to check ONLY endpoints values.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

4. Schematic: To add operating state annotation for transistors (active, cutt-off, saturated).

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

 

0 Kudos

9. Simulation: To add assymetrical tolerances option for a components (resistors, capacitors, voltage and current sources etc.)

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

7. Simulation: Current Worst Case simulation can not find right solution for a non monothonic functions, so please consider to add Hooke-Jeeves algorithm to find real min and max.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

6. Simulation: To add circuit optimizer with various algorithms: Hooke and Jeeves, Levenberg-Marquardt etc.

For example: I would like to find a resitor values according to voltage limits.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

13. Grapher: To add option to generate one report for Worst Case EVA, RSS and Monte Carlo.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

12. Grapher: To add histogram plots for a Monte Carlo simulation incl. table with data: MEAN, SIGMA, UCL, LCL:

  •  Normal distribution plot
  • Cumulative distribution plot

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

15. Interface: Batched analysis is fine, but it would be a good to see TEMP parameter visible in main window.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

11. Simulation: To add component stress analysis but more advanced. The goal is to check maximum dissipated power according to derating power characteristics for resistors according to current operating temperature (TEMP parameter for circuit simulation) and maximum voltage for a components (resistors, capacitors).

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

 

 

0 Kudos

14. Grapher: To add 3D plots (see circuit optimizer).

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

2. Schematic: To add power bias annotation for a components.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

5. Schematic: To set some min and max limits for a voltage, current or power (they shall be visible in Grapher when you generate the plot). 

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

18. Model: To add a module that can build a component model from characteristics from datasheet (eg. to track output voltage characteristics of voltage regulator and to build behavioral model).

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

1. Schematic: To make an option to lock REFDES during copying circuit to the new sheet.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.

0 Kudos

10. Simulation: To add additional drift tolerance (aging, humidity etc.) option for a components (resistors and capacitors). Please create an option to turn ON and turn OFF additional drifts globally for a whole circuit design and for specific component.

 

Notes:

This idea is splitted from topic "NI Multisim - new ideas" posted in 2014:

http://forums.ni.com/t5/Multisim-and-Ultiboard-Idea/NI-Multisim-new-ideas/idi-p/2792686

 

If some ideas are implemented in NI Circuit Design Suite 14 they shall be skipped and topic can be removed by admin.