From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.

We appreciate your patience as we improve our online experience.

Multifunction DAQ

cancel
Showing results for 
Search instead for 
Did you mean: 

increase counter timebase pcie 6259

Solved!
Go to solution

 

hi

Im am trying to perform 2 two edge separation measurements on 2 TTL signals using pcie 6259. I keep getting an error msg 200140 "2 consecutive active edges of input signals occurred without a counter timebase edge. Use a faster counter timebase. Ive tried to change the counter timebase thru the DAQmx channel nodes but my card is restricted to a mx of 80 Mhz.

 

Are there any ways around this?

 

regards

don

0 Kudos
Message 1 of 7
(4,001 Views)

Hi Don,

 

The fastest timebase in the M Series cards are the 80MHz timebase, from which the other time bases are derived. The time between the edges you

are trying to measure are less than 1 clock cycle of the 80MHz timebase, which means that this measurement cannot be made with your current

configuration. We do have prescaling on our 660x counter boards which allows you to measure the frequency or count the edges on a signal up to 125MHz. In your case the time between edges may be too small regardless of the rate of the signal. Do you know the expected value for your measurement? What are the rates of the signals you are measuring?

 

How Does the Prescaler on a 660x Counter Board Work?
http://digital.ni.com/public.nsf/websearch/16AA67C3B87449CEC1256C690059B8BB?OpenDocument

Steve B

0 Kudos
Message 2 of 7
(3,985 Views)

Hi Steve,

cheers for replying. Im actually expecting a separation of around a 20ms which is much higher than the period of 1 cycle of my internal clock. My signals are constant 5V TTLs and I perform the edge separation only when falling edges are sensed.

 

Since that wasnt working Ive been trying to measure the pulse duration of one of my signal. I first wired the TTL to an AI and tried to find the pulse measurement vi without any success as i keep getting an error message stating that my signal did not cross the ref levels...

I then tried measuring the pulse width using using counter 0 in MAX instead but keep getting some random values in the nanoseconds, then a timeout exceeded error message.

 

What exact min and max values should I be looking. Looking forward to ur reply

 

 

regards

Don

 

 

0 Kudos
Message 3 of 7
(3,980 Views)

Hi Don,

 

I should have noted before that the prescalers do exist on the M Series cards, though they will divide down your signal and make it available to the counter source input, which will not work for a two edge separation.

 

What is the frequency and expected value for the pulse width measurement. Do you know if your signals are clean signals? If there are additional spikes or noise it is possible that this could introduce problems for the counter measurements. It would be best for you to verify your signals with an oscilloscope or to test some signals that are known to be clean. You could try generating a pulse train from a counter and connecting that to your other counter to verify that your measurements are correct.

Steve B

Message 4 of 7
(3,957 Views)

Hi Steve,

sry for the late reply. I am expecting a pulse duration of about 20ms~30ms. My signal is from an optical switch and is a constant TTL signal in high state until an object passes thru it which brings the signal to a low state for about 20ms.

My signal is a clear one, as it passes thru a voltage comparator IC before it is connected to the DAQ card. Ive also tested it using the CRO as suggested and they appear to be clean.

Ive also checked that the signal is properly grounded and I still cannot get any accurate measurements.

 

When I try using ctr0 for a pulse width measurement in MAX, the value that it spits out is in the nanosecond range and also an error message pops up stating that the specified timeout has expired which suggest that it does not detect any signal change at the gate (PFI9).

 

 

 

 

0 Kudos
Message 5 of 7
(3,940 Views)

Hi Don,

 

I like Steve's idea of generating a known pulse train and feeding this into ctr0 to ensure proper functionality at the board level. It sounds like your signals are valid so this would be a great test.

 

The voltage comparator IC may be bringing your pulse out of spec in terms of slew rate. Does the output from this IC stay within the 50ns or less rise/fall time requirement of the TTL standard? Just something to make sure about.

PBear
NI RF
Message 6 of 7
(3,906 Views)
Solution
Accepted by topic author DAQ_Newbie

Hi Polar Bear,

 

Ive tried steve's idea of generating the PWM and feeding it into my ctr and it works just fine. so the problem was indeed with my signal coupled with the voltage comparator.. as you thought you genius !!

Thank you heaps for your help.  

 

Don

 

 

0 Kudos
Message 7 of 7
(3,886 Views)