how do you set the idle state on 6602 counters using Traditional DAQ

[JDSurge]

Hi.  This is my first post so bare with me.

I use the 6602 card with Traditional DAQ to generate PWM's from 1/256 to 255/256's during testing of High Voltage Power Supplies using a PWM generator vi that calls out a generate pulse spec vi.  This works fine but now I have a need to generate a low output and a high output to simulate a 0/256 and 256/256 pwm case.  The pwm generator vi divides the pwm that you want by 256 so you cannot send a 0 for a totally low signal or a 256 for a totally high signal.  A member at work told me how to create a high or low signal using DAQmx by stopping the counter and setting the idle state to low or high but I would have to rewrite the whole program using DAQmx (which I should do anyway but time is valuable).  So my question is, can you set the idle state simular to this in Traditional DAQ or set the output high or low some other way like testing for a 0 or 256 value and bypassing the pwm generator and setting the output high or low directly?

Thanks in advance for you help,

John

[Jarrod_B.]

John,

The "output polarity" counter attribute is used to set the idle state of the counter.  You can set this by calling the Counter Set Attribute VI and selecting "output polarity" as the enumerated constant input to the "attribute ID" terminal.  You can use this to have the counter output go to a high or low state when you stop your PWM pulse train. 

Hope this helps!

Regards,