11-01-2006 05:57 AM
11-01-2006 08:26 AM
The basic problem is that your backdoor workaround is also not supported by your board. There just isn't a way to get hardware-driven timing for digital output bits on that board. Not with a sample clock, and also not with a trigger.
Maybe you can wire your counter output to a simple external chip that'll reproduce the pulse while sourcing more current?
-Kevin P.
11-01-2006 10:06 AM - edited 11-01-2006 10:06 AM
Message Edited by gavril on 11-01-2006 10:07 AM
11-01-2006 10:20 AM - edited 11-01-2006 10:20 AM
gavril:
I use the HPCL-2300 high speed optocoupler quite often to isolate counter signals. Google it to find the app notes. If power on state does not match your requirements, you can use an inverter (SN7404) Attached is a screenshot of a schematic from a system that uses such. No need for U1 in your app, U2 is the aforementioned inverter, C1, R1A/B, U3 and C4 are needed. The output of U3 can be used to pull your 3.3V input low.
Good Luck
-AK2DM
Message Edited by AnalogKid2DigitalMan on 11-01-2006 09:20 AM
11-01-2006 02:16 PM
AnalogKid-
That's the strangest LabVIEW code I've ever seen. And what's with the green wires?
11-02-2006 05:12 AM - edited 11-02-2006 05:12 AM
Thank you Analog Kid.
Another strange LabView code that I have received. In this case, Sync-in is grounded when DAQ output goes into low state. I was told that the resistor can be as low as 1K or as high as 10K. What would be the best value if the DAQ output corresponded to the CTR0_OUT terminal (pin 2)? How does one determine this value? As usual, I appreciate any comment/suggestion. Gabriel
Message Edited by gavril on 11-02-2006 05:18 AM