05-25-2006 03:21 AM
05-25-2006 08:20 AM
Because the M-series boards have an 80 MHz internal timebase, the highest frequency you can generate with normal methods is 20 MHz (2 cycles low, 2 cycles high).
The resolution you can achieve is based on integer divisors of 80 MHz. As you divide by 4,5,6,7,8 you produce pulsetrains of 20 MHz, 16 MHz, 13.3333 MHz, 11.4286 MHz, 10 MHz. Generally, you'll get better freq resolution as the pulsetrain's base frequency decreases.
I haven't verified this, but the M-series boards might support a more advanced configuration option that can produce a 40 MHz output. First some background, using the example where you want the maximum output frequency with 2 cycles low and 2 cycles high.
Internally, the value 2 (# low cycles) is placed in the count register. Each active edge of the timebase will decrement this value. When the decrement causes the value to reach "terminal count", or 0, the counter's output will toggle from high to low. Then the other value 2 (# high cycles) is placed in the count register. Again, each active timebase edge decrements the count. When it reaches 0, the output toggles again.
So, every 2 cycles of the timebase, the output changes state -- 1 rising and 1 falling edge. So there are 4 cycles between consecutive rising edges.
So how might you get 40 MHz? Well, there is an option available to configure the output to pulse on terminal count rather than toggle. Then each time the count reaches 0, the output will produce a pulse whose duration is 1 cycle of an internal timebase. If the M-series boards use their internal 80 MHz timebase for this pulse, then you could end up with an output that creates a 1 cycle wide pulse every 2 cycles. The effect is a 40 MHz pulsetrain output.
However, it's also possible that the M-series boards will use their 20 Mhz timebase for this pulse (just like the E-series boards did), in which case 20 Mhz would still be the maximum output frequency. Unfortuantely I'm not near any hardware to test this out.
(Summary of my reasons in this post, part of a voluminous thread of mostly complaints starting here).
05-26-2006 12:04 AM
Thanks for reply.
Can u tell me , what is the minimum frequency we can generate using M Series (PCI 6221 68 pin) card?. What is the lowest value of divisor?. what do you mean be 80 MHz internal timebase?.what do u mean be -2 cycles low, 2 cycles high.?
05-26-2006 11:34 AM - edited 05-26-2006 11:34 AM
Message Edited by Justin M. on 05-26-2006 11:36 AM