buffered retriggerable single pulse generation

[USFphy]

While trying to setup system that will control the triac to allow for power control I came across a problem.  My LabView program is based on the Generate “Retriggerable Pulse (DAQ-STC).vi”.  The modification includes placing the “CTR pulse spec” and “CTR control” subvi inside of the loop (see figure 1)

Now the program works ...except for a missing pulse situation.  It appears that every time the counter is reprogrammed it clears the counter trigger.  Now the counter waits for the next trigger situation.  This leads to missed pulses situation shown in FIG 2.  The blue line is the trigger signal (PFI 9) and the orange is the pulse output.

From the earlier postings I gathered that this is unavoidable.  However, according to the DAQ-STC Technical Reference Manual (section 4.4.3.4) there is BUFFERED Retriggerable Single Pulse Generation, this approach should remove this problem since I could update the memory buffer vs. the hardware reprogramming (as it is done now).  How do I implement this, I find no information of how to program Buffered Retriggerable Single Pulse Generation.  The “CTR group config” subvi does not have this option (see FIG 3).

For this application I use E -series cards (STC based)


Otherwise I use DAQCard-AI-16XE-50, DAQCard-6036E, PCI-MIO-16XE-10, PCI-6221 ...

[Hani R]

Hi USFphy,

I'm not sure what you mean by "every time the counter is reprogrammed it clears the counter trigger."  Could you please clarify what you mean?  The manual that you are refering to is rather old and the Buffered Retriggerable Single Pulse Generation is not an option on the STC counter. 

Can you try the Gen Dig Pulse Train-Finite-Retriggerable shipping example on the PCI-6221 (which has a TIO counter) and post back if you get the same result?  You can find the shipping example in LabVIEW by going to the Help menu and selecting Find Example.  Go to Hardware Input and Output » DAQmx » Generating Digital Pulses. 




Message Edited by Hani R on 12-20-2007 06:07 PM

[USFphy]

Thank you for your prompt response.

"Every time the counter is reprogrammed it clears the counter trigger"- of course this is only my suspicion.  When I modified the program to keep the "CTR control - program" subvi out of the loop (see fig4), the program no longer changes the pulse delay, but also does not create situation where pulses are missing so the "CTR pulse spec" subvi is not to be blamed.  It is only when the "CTR control - program" is inside the loop (fig1) that the pulses are missing (fig2).  The "CTR control" subvi uses DLL call so it gives me no suggestion as to what to do next.

You are writing that the Buffered Retriggerable Single Pulse Generation is not an option on the STC counter.  Do you mean that it is not part of the DAQ driver, or that the hardware does not support this mode? From the description (sect 4.4.3.4) it appears that the hardware should be able to call and interrupt (it does it in other modes) to reload the counter with new count as opposed to loading it from the load register.  If that is the case, then the DAQ driver is to "blame".  Of course for me it makes no difference, I still will not be able to use it.

I will take your advice and try the 6221 card, but that will have to wait until after the holidays.

Once again Thank you,
and Merry Christmas