12-05-2012 04:43 PM
Hi,
Recently I am working on a little program to control voltage. A DC voltage can be control by the output signal of a PCIe-6341. The program control the high voltage power supple to change from zero to 7000V in 5 seconds, and be stable at 7000V at 5 minutes, and then come down smoothly to 0V in 5 seconds.
Now the question is, during voltage dwell, the signal does not stay on the last number. The signal voltage drops back to zero and make the high voltage back to zero. How to make the signal voltage stable at last reading and then to come down smoothly to zero?
Thanks!
Solved! Go to Solution.
12-05-2012 07:19 PM - edited 12-05-2012 07:43 PM
@Kyle-Z wrote:
Hi,
Recently I am working on a little program to control voltage. A DC voltage can be control by the output signal of a PCIe-6341. The program control the high voltage power supple to change from zero to 7000V in 5 seconds, and be stable at 7000V at 5 minutes, and then come down smoothly to 0V in 5 seconds.
Now the question is, during voltage dwell, the signal does not stay on the last number. The signal voltage drops back to zero and make the high voltage back to zero. How to make the signal voltage stable at last reading and then to come down smoothly to zero?
Thanks!
did you look at my last post to you? plus look at the Ni examples to generate your control voltage AO...under hardware input and output>daqmx>analog output>voltage
12-05-2012 08:39 PM - edited 12-05-2012 08:42 PM
12-06-2012 09:07 AM - edited 12-06-2012 09:12 AM
@Kyle-Z wrote:
Hi,
...
Now the question is, during voltage dwell, the signal does not stay on the last number. The signal voltage drops back to zero and make the high voltage back to zero. How to make the signal voltage stable at last reading and then to come down smoothly to zero?
Thanks!
because you defaulted the value back to zero in the dwell case statement and you left out a shift register...
12-06-2012 10:42 AM
Thank you !