Sync puls before first output data

[5660]

I try to form digital pattern with DAQmx digital output and synchronize it from counter0 от PXIe 6255 and see that I have first puls from counter before first bit of output pattern. Where is my mistake and what Ihave to do to shift sync pulses?

 

 

 

[Kevin_Price]

1. You've configured the DO task to be sensitive to the *falling* edge of the counter's output.  Right-click on that input to DAQmx Timing and create a new ring constant that'll display words rather than cryptic numbers alone.  (You can again right-click and turn on Digital Display in the Visible Items context menu if you want to also see the numeric values.)

2. You've configured the DO task to have 4 lines, did not explicitly declare your 'line grouping', only define 2 1-D boolean arrays of DO values, then convert them into a (regrettably opaque) digital waveform at a different apparent sample rate than your CO pulses.

3. The scope shows an initial DO pattern of 3 samples on, 4 off, then alternating 1 sample on and 1 off.  This pattern is not present in the default values of the boolean arrays on your front panel.  So I can only suppose that the scope trace came from a run with *different* config params than what you attached.

4. I suspect your sync is just fine, you just need to properly define and merge your DO data and configure the task to use the counter's *rising* edge.

-Kevin P

[5660]

Thanks a lot,Kevin, for reply! 

I send my pattern to device that recieves data on rising edge of clock. So if I change polarity of clock the first bit of data comes simultaniously with rising clock. Is there any possibility to shift first rising clock on a half of period relatively to data?

More correct screenshots and program are attached  

[Kevin_Price · Accepted solution]

I think the thing to do is to change the pulse train polarity.   When configuring the CO channel, there's an 'idle state' input that you can change to be High.  Then pulses will go from high to low back to high again.  So the first transition will be a falling edge to set your digital state and the next transition will be a rising edge to activate the external device.

You may need to figure out how to deal with the power-up state of the counter's output pin so you can make sure the hardware wants to idle high rather than low.  Otherwise there'll be a rising edge when you start the task and the output changes from its power-up state to the task's idle state.   Some devices allow you to set this up in MAX, others might need a pull-up resistor to bias the output high, others might need you to add a chip between the device output and the external device.

-Kevin P

[5660 · Accepted solution]

Now it's OK,KEVIN! Thank u very much! I had found right combination of counter's idle. state and  active edge of it!