06-15-2023 05:02 AM
Hello,
I am working on the PXIe-4467 to generate sinewave as an input to an ADC.I am facing difficulties in achieving coherency
for the input sine signal. Though on paper the parameters are coherent, it is on the implementation FFT that I am seeing two
additional bins. (Refer to Pic1).
I am suspecting this could be due to the input frequency not being a multiple of the time resolution of the source
instrument (4467 in this case). We were unable to find the time resolution for 4467 in the spec file. This parameter is
specified for the PXIe 6368 in its spec.(Refer to Pic2).
It would be helpful if you could help me out with the timing resolution for the PXIe 4467 to achieve single bin coherency for sinewave generation.
Alternately, if anyone has achieved coherency without this information, please do share how you
implemented the VI.
Note - I am using PXIe 4467 instead of PXIe 6368 because it has a higher resolution of 24 bits compared to 16 bits for 6368.
Regards,
Sreekar
07-11-2023 03:05 AM - edited 07-11-2023 03:23 AM
What you see is fft leakage ..
I don't know how you generate the sine output , I suspect if you use a simple funktion generator vi the output frequency migth be coerced ...
FIRST: make shure you use a common timebase 😉
If you need to generate ,capture and measure any frequency/phase/amplitude without SR 'limitation' to n periodes in m sample (for higher n and m the deviation can be quite small) you need to use continious generation while feeding new values to the output and use sine fitting on your input.
If you go the n periodes in m sample way, you can use the FFT with m or multiple m sample window length (and rec window)
EDIT: If you use the same SR for generation and capture, you migth run into the problem that you generate a new value at the same time you want to sample. minor glitches can give noisy or not phase stable results. but you can configure different delays or slopes in the timing clock properties.. (don't expext that with a sigmadelta converter but who knows ..)