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Sample Clock source routed to PCI-6722 from external source via RTSI

Hello there,

I am trying to synchronize the Sanpling clock sources originating from a DIO64 by Viewpoint Systems to a PCI-6733, a PCI-6731 and a PCI-6722 that are all linked by an RTSI cable. The digital triggers, or clock ticks are on various RTSI lines, but also available on external connector blocks. I verified, that the triggers are there in both cases with a digital scope, so the source of the triggers has nothing to do with the problem.
the task is fairly simple, I want to use external pulses to clock the output in a Finite Sample voltage output scan, which according to the specifications should be possible.
see e.g.

With the 673x cards the code works fine, the boards output the samples at the triggers on the RTSI bus, so the code seems to be o.k.

But the 6722 simply does not respond to any trigger, that I input. I first tried a "Direct Route" from /Dev3/RTSI6 to /Dev3/ao/SampleClock which according to DAQmx is possible, as I did also for the 673x's, but it has no effect, though it does not generate an error.

Then I tried an external route (i.e. a 2-wire cable) to the PFI-9 connector and routed /Dev3/PFI9 to /Dev3/ao/SampleClock, but this has the same effect: none. I attached a jpg with the Labview 8.0 code.

The card seems to be physically o.k., i.e. all outputs and inputs behave normally on the test-panel, further the card is brand-new so...

As the code works as foreseen for the 673x's and generates no error, I'm running out of ideas, what to try, and why the 6722 sinmply does not respond..

anyone an idea?

thanks for the help,
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Message 1 of 16
Hello ChB-ENS,
You seem to have lead tests using MAX. Have you tried the test that would consist in sampling an analog signal using an external clock (just specify the PFI line you want to use) with the 6722 ? If yes, what about the result of such a test. If no, this is an interesting test to lead.
Furthermore, is it possible for you to attach your VI directly so that I could work directly with please ? It will help me greatly.
Best regards,

Message Edité par Mathieu Steiner le 08-18-2006 08:19 AM

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Message 2 of 16

Hello again,

Could you please try sampling and also generating (what is actually our concern here) an analog signal using a external clock as mentionned above ?


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Message 3 of 16
Hello Mathieu Steiner,

thanks a lot for your interest and help in this issue.

I will see to set up a analog input test a.s.a.p., but I am honestly not sure if this is possible with this model, since somewhere in the help-files I believed to have read, that for the 672x models, only the output clock can be taken from an external source, and also the "Device Routes" table in DAQmx does not indicate this option (/dev3/ai/SampleClock from anywhere outside), but I did not dive into this yet, since as you said rightly this is not my intention anyway so I did not try yet I'll see what I can do.

But in the mean-time, I send you hereby a zip-file with the code that I generated along with two bmps, which show screen dumps of a digital scope responding to the program execution.
The "Response 6731.bmp" shows, how the picture should look like: the bottom line shows the pulse sequence of the DIO-64 card, and the Analog output values change state on each rising flank. there are some extra pulses, where I did not preprogram the FIFO of the PCI-6722, so there is no more response, but that's as it should be.
This very pulse sequence is occurring also on the RTSI channels 1, 5 and 6 and on the PFI0 pins by a cable, as I verified directly with a scope on the RTSI cable pins.
That the 6722 receives these, you can see in the program code, where I re-routed RTSI6 to PFI4 and put the output onto the scope too; in "Response 6722.bmp" you see how PFI4 echoes the pulse sequence. But on the very same bmp you can see the response of the PCI-6722/ao0: a flat line. The only difference between programming of the PCI-6731 and the 6722 is that all occurences of "Dev3" are replaced by "Dev2". The response btw. is independent of the re-reouting being active or deactivated by the little Boolean constant.
As you see in the DAQmx-timing control node, I also routed RTSI7 (carrying the MasterClock of the DIO-64 digital board to improve synchronization, 20MHz) as the "/Dev3/MasterTimebase" but I did not verify yet, if that routing is in effect.

Well, I am not sure, if you can make the vi run just like that, you might need the DIO-vi's and those are provided by Viewpoint-systems, so I'm not sure if I'm authorized to pass you those. And even if you had them, they would state an error, if no physical DIO-64 is installed in your hardware.
But: I also tried routing PFI0 as the sample clock, and wiring the pulse-sequence by some wires, it takes only a mouse-click to do this: I just changed the "SampClk.Src" of the DAQmx Timing control node to "/Dev3/PFI0", but the answer was again a flat line. So if you want to try to run this, take a 6722, remove the entire Dio-64 related code and wire some external function generator to the PCI-6722. I that helps you I can prepare a code version for this.

thanks in advance, I'll keep my eye on this thread,
best regards,
Christian Buggle
Post-doctorial researcher
Ecole Normale Superieure Paris
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Message 4 of 16

sorry, I just realized, that maybe I wasn't quite clear about the "Response 6731.bmp":
I program all FIFO's for the channels ao0 through ao3 of the PCI-6722 and the PCI-6731 with the same sequence of just 8 analog values.
It's the 6731, which responds, but in my phrase I wrote "where I did not preprogram the FIFO of the PCI-6722", I should have said "PCI-6731" but that's the same in this case....

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Message 5 of 16
p.p.s something went wrong with the attachment...
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Message 6 of 16

Hello Christian,

You are right concerning the unablity of the 6722 to acquire analog signal. I made a mistake regarding this. My intention was to make you lead test to use one of the eight analog outputs of the board using MAX. Using an external clock to clock such generation (PFI 0...9). If the test fails, the board must have a problem, if the test succeeds, wa are doing something the wrong way. You says that the board seems physically alright I need more information about the results of this test.

By the way, thanks for having attached both code and chronograms. I am currently looking deeper into...

Please keep me informed.

Best regards,

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Message 7 of 16
Hello Mathieu,

so here I have the result of a test, where I used an external clock source.

I wired a Thurlby Thandar Instruments Pulse generator Model TGP110 into PFI2 of the PCI-6722.
I used the CMOS-TTL output and set the generator to manually gated (by a front-panel button) mode, where it generates a train of pulses essentially as long as I keep the button pressed, with a pulse TTL-high-duration of 1ms and 12ms repetition period.

I used the attached code to program the PFI2 to act as the SampleClock, routed the on-board 20MHz clock back to the MasterTimebaseSource and mirrored also as a little test the PFI2 to PFI4 (again possible to activate/deactivate). The attached bmp shows, how the pulses are echoed back out of the 6722. I'm pretty certain, that the pulses are well in agreement with the timing requirements for length and level, but as you also see: no output. The vi terminates after the 10sec. timeout of the "DAQmx Wait Until" has elapsed with the according error message. No other errors are reported, as before.

I also had a look at ao1 (just in case that the channel ao0 is broken) but also there is no output. Well, I checked for routine, but I doubt, that the DAC is broken, since all test-function on the DAQmx TestPanel work normal, including sine-wave generation on all channels.

So the mystery continues. If there are any other tests, you propose to perform, don't hesitate to let me know, I'm stuck with this project because of this.

best regards,
Christian Buggle

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Message 8 of 16

Hello back Christian,

I really would appreciate if you could lead the test using MAX ... (Measurement & Automation Explorer) This would help us to go on with your concern. MAX actually is our main test tool to ensure the good functionning of a board. I wait for such a result test to have search directions regarding your problem.


Message Edité par Mathieu Steiner le 08-22-2006 01:51 AM

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Message 9 of 16
Hallo again Mathieu,

Presuming, that understood correctly what exactly you proposed, I have the result of the MAX-test.

I used the Measurement and Automation Explorer (an image of the "about" is in the attached zip-file) version
I created a new NI-DAQmx Task, let this one run by pushing the "Test" button and triggered the clock again by the very same function generator as described above. I made partial screen dumps of all configurations, so it's really clear what I put where.
The result is positive, the sine-wave is triggered out, as you can see on the screen dump of my digital scope, which is also in the zip-file. I also made a short test with more samples, so it seems to work fine.

I hope,  you can draw the conclusions out of this. If you need any more information, just let me know.

thanks in advance,
Christian Buggle
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Message 10 of 16