Multifunction DAQ

cancel
Showing results for 
Search instead for 
Did you mean: 

Possible to use FPGA clock as Master Time Base Source for NI 9234 ?

Solved!
Go to solution

Hi,

 

I am running a NI 9234 and a NI 9222 module on a cRIO-9114 chassis with a 9022 real time controller, aquiring Data on all 8 channels on full sampling speed, using the FPGA. 

My problem is the synchronization of the Data, where the NI9234 usually has a delayed aquisition, compared to the NI9222. I've tried manually delaying the NI9222 from taking the first samples but to no avail so far. 

To solve this problem, and also to ensure a more comparable Data rates on both cards, I was wondering wheter it is possible to create a Master Time Base Source for the NI9234 WITH THE FPGA (opposed to importing it from another NI9234 or similar module)? The NI9222 I already supply with sampling pulses from the FPGA (as intended with this module). 

Another question would be the exact timing characteristics of both modules, especially concerning timing between start of the aquisition and the first data samples. I couldn't find any information to that regard...

 

Thank you in advance,

O Hoppe

0 Kudos
Message 1 of 4
(3,178 Views)
Solution
Accepted by topic author hop.bimaq

Hi!

 

I never heard of a possiblity to use a FPGA time base with a Delta-Sigma module.

But I think the question should rather be what didnt work in delaying the signal and how you did it. Have you read this article?

 

How Can I Compensate for Different Group Delays with C Series Modules in LabVIEW FPGA?
http://digital.ni.com/public.nsf/allkb/74EB238E1BCADD528625735300681A7D

 

Can you give a more detailed description of your try to delay the acquistions? Can you provide a sample code?

 

Best regards,

Christoph

Staff Applications Engineer
National Instruments
Certified LabVIEW Developer (CLD), Certified LabVIEW Embedded Systems Developer (CLED)


Don't forget Kudos for Good Answers, and Mark a solution if your problem is solved
Message 2 of 4
(3,141 Views)

I was afraid that supplying the NI9234 with an external clock from the FPGA wouldn't work, but I though it worth asking anyway.

 

Alas, I've just now stopped working on this part of the project, so I won't be able to look into the possible solution to the delay problem you provided. But as I have missed the input delay you pointed out and the link you gave me looks very promising, I will mark your answer as a solution to my problem for now. I'll get back to this topic as soon as I'm able to start working on our signal aqusition again. 

 

Thank you very much, best regards,

 

O. Hoppe

0 Kudos
Message 3 of 4
(3,137 Views)

Thanks for your quick reply!

Just get back to me if that doesnt turn out the way you want it to be.

Staff Applications Engineer
National Instruments
Certified LabVIEW Developer (CLD), Certified LabVIEW Embedded Systems Developer (CLED)


Don't forget Kudos for Good Answers, and Mark a solution if your problem is solved
0 Kudos
Message 4 of 4
(3,130 Views)