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PCIe-6374 - synchronization of AI/AO with respect to external pulse

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Hello

 

I have a basic question on the PCIe-6374. Is it possible to set up this card as follows:

Every time I receive an external pulse (what input would I use for this pulse),

1) I would like to sample 2 AI channels at a specified delay with respect to the rising edge of the pulse. This will collect 2 samples, 1 per AI channel. The range for the delay will be few us to 100s of us with 100ns or better precision to set this delay value

2) Similarly for 2 AO channels, I would like to output 1 sample each at a different specified delay with respect to the rising edge of the same pulse. The delay specifications are similar to the above.

 

The external pulse repetition period will be greater than the specified delay.

 

Many Thanks.

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Accepted by topic author NimaAsghari

1. I note that your board is a simultaneous-sampling board for AI.  That's gonna help since you have some pretty precise timing requirements.   (Also simultaneous for AO, but that's pretty universal on NI multifunction boards.)

 

2. Assuming the external pulse is 5V digital logic, you can wire it to any available PFI terminal.

 

3. I would set up 2 similar but independent counter tasks, one each to drive AI and AO sample timing.

 

4. Both counter tasks will be configured for retriggerable single pulse generation.  There's a special DAQmx property to configure for your board that will help make delay timing consistent for all triggers instead of having different timing on the very first one.

 

5. Attached is an example using 1 counter with AI.   I used the known signal "/Dev1/100kHzTimebase" as the external pulse source for testing.   Change it as needed for your external pulse source.   AO can be done very similarly with another counter.

 

6. Note that I further tested the timing using a shipping example for 2-edge separation measurement.  What I *measured* was that the interval from the 100 kHz timebase rising edge to the counter pulse rising edge was a 40 nanosec longer than the exact amount specified by my delay input.  It was very consistent though.

   I then tried measuring the additional interval from the counter pulse rising edge to the AI Convert Clock edges.   These measured out at an additional 90 (falling) or 130 (rising) nanosec.   Offhand I'm not sure which is the active edge for the convert clock.

   The main point: be aware of some of these timing subtleties as you try to hone in on extremely precise timing.  Be sure to confirm the actual signal timing the best you can.  You may need to reduce your programmed delay by an amount equal to these built-in additional delays.

 

 

-Kevin P

 

delayed sampling.png

 

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Kevin - Thank you very much for clarifying how this would be done and the expected timing accuracy. I can certainly calibrate out the additional delay as long as it stays constant from run to run and also hopefully power up to power up.

 

Regards,

Nima

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