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PCI-6733 replacement

Hi,

Our experiment is controlled by 3 PCI-6733 boards. Each one is connected to BNC-2110 which gives 24 analog  +/- 10V outputs. The system is synchronized eith external trigger.

Is there PCIe replacement for PCI-6733 compatible with BNC-2110? Is it possible to replace 3 PCI-6733 with 1 PCIe-6738 and what connector block should be used in that case?

Thanks

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If it's ok in your app to group all 24 AO channels into a single task, the 6738 can work.

 

The recommended connector block on the product page is the SCB-68a.  Just be sure to check the device's unique pinout - the default pinout labeling that comes with the connector block might be for the more commonplace MIO boards.

 

 

-Kevin P

ALERT! LabVIEW's subscription-only policy came to an end (finally!). Unfortunately, pricing favors the captured and committed over new adopters -- so tread carefully.
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Message 2 of 9
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Thanks for your reply.

I'm not sure if I understand "single task" correctly. If we program just one channel to output +5V  will the rest 31 channels also output +5V?

In our setup each channel provides independent voltage value following it's own time sequence. 

We use 3 separate PCI-6733 bords only because each has only 8AO. If 6733 had 24 AO channels and BNC-2110 had 24 AO BNC female outputs  we would use one PCI-6733 and one BNC-2110. 

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The 6738 only supports 1 "timing engine" for AO.  So any hardware-timed AO channels need to be part of the one and only hw-timed task.  Each channel can have distinct waveform data, but all the AO will be generated at the same output sample rate.  

 

 

-Kevin P

ALERT! LabVIEW's subscription-only policy came to an end (finally!). Unfortunately, pricing favors the captured and committed over new adopters -- so tread carefully.
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Thanks a lot for reply.

 

I would really appreciate if you could help me understand the explicit difference between 6733 and 6738 boards especially in the context of voltage generation at the AO channels. As per the 6733 block diagram, the AO sample clock updates all the AO FIFO buffers as well as the DAC outputs. I could not find a similar block diagram for 6738, however, the manual does say that the AO sample clock will update the DAC outputs of all AO banks operating under hardware-timed generation. Would it be correct to consider the AO sample clock in 6733 board as a single hardware -timed generation signal and if yes, does that not make the AO generation through these boards identical ?

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The nature of how the sample clock timing works for AO generation on 1 single 6733 or 1 single 6738 is indeed identical.  1 timing engine, thus 1 available clock, thus all AO channels in the task update their output sample at the same time.

 

Your description of your original system left open the possibility that your 3 distinct 6733 boards might have different sample clock timing while still being sync'ed by a start trigger.  That's what I was being cautious about.  You might have had 3 sets of 8 channels each that sample at different rates.   On the 6738, that wouldn't be possible.   It's still not clear if this is relevant though.

 

If all your 6733's shared a common sample clock rate, you'll be fine using the 6738.  Quite possibly even better as the distinct 6733's would have had very slightly different crystal oscillator timing due to production tolerances.  If you let each generate its own sample clock after a common, shared start trigger, they would eventually get out of timing alignment.  Probably in the low single digits of seconds per 24 hours.

 

 

-Kevin P

ALERT! LabVIEW's subscription-only policy came to an end (finally!). Unfortunately, pricing favors the captured and committed over new adopters -- so tread carefully.
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Thank you Kevin for your detailed reply, it indeed helped in clearing my confusion. 

 

It will be great if you could also help me with one clarification regarding the DAC's in 6738 board : knowing the effective resolution will be important to our application and so wanted to confirm whether all of the 16 bits which are input to the DAC contain the actual data or if some of them are used for other purposes like for example, assigning polarity to the AO voltage, selecting a particular AO channel from a bank ... etc. In that case, the effective data bits will reduce and the resolution would be lowered.

 

I ask this since the manual for 6733 indeed shows separate bits as input to the DAC's for selecting voltage polarity, reference selection etc. plus each DAC in 6733 board is assigned to one AO channel. However, the schematic in 6738 manual does not show any polarity / reference selection bits and the schematic further appears to suggest there is one DAC for 4 AO channels in each bank . So I was wondering whether bits for selecting an AO channel, voltage polarity etc. are part of the 16 input bits, in which case, the number of data bits will reduce and the resolution will be lowered.

 

Again, thanks a lot for your time and consideration. 

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I finally took a deeper dive into the 6738 docs to look at some of the details you're concerned about.

 

First the spec sheet declares pretty clearly that the output signal has 16-bit resolution.  Any other digital signals needed for reference selection, polarity, whatever would be separate from the fact that you will get 16 bits worth of resolution from the DAC conversion.

 

I saw the part of the manual where each DAC supports 4 AO channels, which was a surprise to me.  Further reading about timing signals didn't seem to clarify how this sharing works.   I expected to find something analogous to the AI Convert Clock that's used to multiplex analog input conversions into a shared ADC on many common NI multifunction boards.  But I didn't see anything like that in the manual nor did I see anything similar in code under a DAQmx Timing property node.

 

So I can't give you a final, authoritative answer about the details of how it works, but the description and specs seem pretty clear that there are no special restrictions about which channels can be used simultaneously.  So I personally feel confident that you can generate on all 32 channels, I just don't know precisely how those DACs get shared in the process.

 

 

-Kevin P

ALERT! LabVIEW's subscription-only policy came to an end (finally!). Unfortunately, pricing favors the captured and committed over new adopters -- so tread carefully.
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Did you end up replacing your PCI 6733 with PCIe 6738 boards? We have an experimental setup that is very similar to yours: 2 x PCI-6733 boards with each one connected to BNC-2110 giving 16 AOs. Since PCI-6733 is no longer offered for sale, I am looking into PCIe-6738 as an alternative. Additionally, I do not find a BNC terminal block with 16 or 32 analog outputs. I am also reading that BNC-2110 is not compatible with PCIe-6738.

 

Did you also figure out the resolution with PCIe 6738?

 

Appreciate any help you can offer.

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