Hi,
when you say synchronise, exactly what do you mean?
If you share a board clock from one to another, there's a physical path length that the signal has to travel, so the "slave" board will always have a fixed phase relationship to the "master's" clock.
Unfortunately, the 10MHz backplane clock of the PXI cannot be routed to the 4472 as a board clock, so the synchronisation you have is correct and as per the examples, but as long as you're aware of the fixed phase that should be OK, and it's measureable and fixed.
Now the binary data you're using the build array to take 2 lots of 2 D data and make a 3D data layout.
Reading this could be a little tricky. It might be better to concatenate the data (right click the build array and select concatenate) such that you end up with a 2D array say with the channels as the columns, and then the data going down. (you may need to transpose the data slightly)
Please let me know if that helps
Thanks
Sacha
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