Difference between PFI and DIO signals

[anjali0034]

Hi,

I have been using the PXIe-7856R R Series multifunction card to output digital signals via DIO pins. I’m now planning to replace it with the PXIe-6363, which is part of the X Series DAQ family (32 AI, 48 DIO, 4 AO).

While reviewing the PXIe-6363 documentation, I understand that it provides:

• 32 lines on port 0 (P0.<0..31>)
• 16 lines on PFI <0..15>

Although, I have seen multiple threads stating difference between them as PXIe-6363 has static digital I/O pins and timing I/O signals, I am actually unable to understand it. Could you please help me in understanding if I can use any of these PFI/PO channels to use as replacements for the DIO functionality I had on the PXIe-7856R.

Note: I am using the DIO lines to send digital signals (12V--> when routed via SLSC) to a BMS module for control signals such as Charge Enable, Discharge Enable, etc.

Thanks in advance!

[Kevin_Price]

Consult your device's pinout assignments.

On X-series devices, it's typical (maybe universal?) for DIO port 0 to be dedicated as digital IO *only*.  These pins *cannot* be used for PFI functionality related to timing signals such as clocks, triggers, and anything related to counter IO.   Port 0 pins are labeled at the link as P0.0 through P0.31 with a meaning like "Port 0, Line 31".

    It's also typical (maybe universal?) on X-series devices that only port 0 can support hardware-timed DIO such as using a sample clock or the change detection feature.

You'll note that all the pins labeled as PFI carry a second designation as a digital pin.  For example, PFI10 is also P2.2.  Such pins can be used either way.  With care, they can sometimes be used both ways at the same time (but at least one of the usages must be read-only).

Here's an example:  consider a simple app that sets up a static DO task to output on Port 1 Line 4.  Whenever the user toggles a GUI boolean on screen, you set the DO output to match the GUI boolean value.  At the same time, you set up a counter task to measure pulse timing characteristics on PFI4.  Even though a different *name* is used, both tasks use the same physical pin and signal.  This is allowed because the DO task controls it while the counter task merely "reads" it.  So the counter task can collect high-res timing info about all the digital transitions initiated by the user clicking a boolean on screen.

Another example: consider an app with multiple tasks that should be hardware-triggered at the same time, based on conditions that have to be evaluated by the app software.  So the software needs to be in charge of deciding when to initiate the trigger signal.   Well, you can just use one of the DIO pins that also has a PFI designation.

    Use a DO task to set the P1.4 low, then configure all the other tasks to be triggered by a rising edge at PFI4.  Then when the app decides it's time to simultaneously trigger all the other tasks, it can set P1.4 high to create the rising edge they're looking for.  (I would typically follow that by immediately setting P1.4 low again just to put it back to its initial state.  The falling edge will have no effect on the other tasks, it just gets the DO task ready for the next time the app wants to generate a triggering pulse.)

-Kevin P