First, since your trigger signal is 10V, you must hook it up to PFI0. Sending 10V into a counter gate can damage the counter (as it is only designed to take 5). Unless you are wanting to take a new set of data every 60 mS, you should not need to modify the Delayed HW analog trigger vi that you have. If what you want is to get a new set of data each time a new trigger comes in, you will need to set things up a little differently. One way to do this would be to configure the counter to do retriggerable finite pulse train generation (see finite pulse train (daq-stc).vi example that ships with NI-DAQ). You would use ATCOUT as the gate for the counter (as shown in Delayed HW trigger example) and use the output of counter 0 as your SCANCLOCK (see Externally clocked examples th at ship with NI-DAQ). By doing this, each time a trigger comes in on PFI0, the counter delays a specified amount and then generates a specific pulse train that is the SCANCLOCK to gather the data. When the pulse train stops, the data acquisition stops.
Nick Wilson Application Engineering National Instruments www.ni.com/ask