I need to read an ADC signal from PXI 6220 to the FPGA module PXI 7811 R the frequency of FPGA and DAQ mismatches
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Could you please be more specific in what you are doing and what doesn't work as you expect it.
I am doing PID control using FPGA if increase my integral gain its 100% duty cycle how can i limit my duty cycle ?
Determin your PID Parameters or coerce the PWM to 1-99