How do I get a 50% dutycycle clockpulse from 7344 stepper drive

[farmjsam]

I need clockpulses (step pulses) with a 50% dutycycle from my 7344 stepper motor drive. Now I get a very short negative pulse, less than 10us.

[Jochen]

Sorry, it's not possible to change the duty cycle of the stepper output of 7344 boards. The steps are generated by the FPGAs onboard and the duty cycle can't be changed by a parameter.
Here are some additional explanations:

The board has a 16 MHz clock (7344/7334), the duty cycle is going to be 25% and it will correspond to 2 clock cycles in the slowest velocity you can go and to 255 clock cycles in the fastest velocity, if you try to go slower or faster the value will coerce to the 2 and 255 cycles. So on the slowest velocity you will get a 25% duty cycle duration of ~126 nanoseconds ( (1/16e6)*2 ), and in the highest velocity you will get a 25% duty cycle duration of ~16 microseconds ( (1/16e6)*255 ).

[Mike Evans]

If you absolutely have to have a 50% duty cycle, then you can do it in hardware by adding a toggling latch to the output and setting the 'steps per second' to be double what you require.

The output of the toggling latch has a "divide by two" action whose output goes high on the first short pulse and low on the second. This will give a 50% duty cycle, but at half the original frequency.

To make a toggling latch, take a 74LS74 and connect the /Q back to the D input. Feed the short pulses into the clock. Have a search on the web and you're bound to find something.

Sounds a bit technical, but it will be a one-chip solution since a 74LS74 has two such latches, each with a Q and /Q output.

[farmjsam]

That is exactly what I already have done.

The reason why I want a 50% dutycycle is that my motor drive circuit can trigger both on positive and negative edge, increasing the resolution by a factor 2.

Thank you anyway!