I'm using a custom VC++ based acquisition software. My data rates from a camera to PCI-1422 grabber are 20-30 MB/s. I'm storing data to a SCSI disk with a controller sharing the same PCI bus. I'm getting dropped frames every now and then. I've verified timing by counting backwards from the number of stored + dropped frames vs. lapped time on my wrist watch. Write cache is enabled on SCSI disk and I should not be pushing the limits on PCI bus performance yet.
I used SiSoft Sandara to study the settings of PCI-1422 and realised that "PCI Latency Timer" and "Line Cache Size" are both set to 255 by default on PCI-1422. According to my understanding value of 255 can cause the grabber to hog the bus for too long time limiting access for oth
er devices like the SCSI controller. Typically a recommended latency timer value is 32 clocks.
I used WPCREDIT to set different value to PCI latency timer (offset 0x0D) and found out that changing that value changes also cache line size (offset 0x0C) to a same value. FYI, I can modify these independently on any other device. Is this a simultanous settings a bug or a "feature" on PCI-1422 IMAQ driver? Any upgrades?
I'm using NI-IMAQ 2.5.1. and rev C of PCI-1422, which should not be suffering from the scarab bus limitation hardware bug.
Thanks in advance!
