This is what I have should I be converting the output of the logic gates? The error says that I need that the sink is a Bool but the source is a 1D array of Bools?
For the four leftmost comparisons (the ones comparing with scalar diagram constants), leave the setting at "compare elements" instead of "compare aggregates.
Please look into in range and coerce for simpler logic.
I'm lost. The only blocks that have the comparison option are the four blocks on the left of the logic gates. The gates dont have that option.
OK have sorted it,
Seriously though, it no wonder embedded system guys stay well away from LabVIEW when something this simple is so complicated.
Thanks for your help.