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g libraries for avoiding truncation of interleaved array?

Hello

I know if we interleave two 1D arrays of different size, the obtained array looses some elemets of the array that is greater in size!

I wanted to ask is there any solution to this, other than build array unction?

is there any open G libarary that exists for the solution of this?

Thanks

Sara

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I don't know of any open G code to do this.  But here's a snippet I put together real quick that should do the job.


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I was planning to submit this to OpenG. Here is a library I put together for resizing arrays.



Mark Yedinak
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Thanks alot1

Can I get the VI of this?

If you can please attach the code so that I can try that out!

 

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How do i have to work with this resize array attachment?

Does this avoids truncation of two 1D arrays of different sizes?

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In the above code what I have perceived from  png pic that is attached,

although it retains all the elements in the array out, but when we decimate this 'array out' to obtain again the required arrays it mix ups the elemets!

For examle array1 {10,20,30,40}

array2{1,2}

arrayout will be {10,1,20,2,30,40} so when we will try to decimate this array to obtained the actual array1 and array2 that we have interleaved we will be getting

array1 {10,20,30}

array2 {8,2,40}

the extra elements are divided again into both of the decimated arrays!

I donot want this because I would be interleaving my data at RT side and then decimating at fpga side! I cannot afford mixing of elemets!

What do you recomd me for this?

tHANKS

SARA

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Hi Sara,

 

Mark provides a polymorphic VI for setting an (1D or 2D) array to a certain size. You just use that VI as is given in it's context help. As it handles just one array that VI will not solve your problem on its own - but you can use it in your routine to solve your problem...

 

@Mark:

You always check your primary dimension for "<>0". Why that?

Wouldn't be ">=0" more suitable?

- You may also want to resize to size zero.

- "-1" is most often default for "out of range"-condition when it comes to array indices.

- There's no difference in setting to any negative dimension...

 

Edited for SARA:

You CANNOT interleave 2 arrays of different length and append the remaining elements of the longer array and on the same time insist of simply decimating the result on the receiving target! THAT WILL NOT WORK! (If you don't believe this: draw on a sheet of paper...:) )

You have to provide more input to the FPGA side, maybe by including information on number of elements or data source...

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO
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Hey

Thankyou

But I havent understood what exactly ypu are trying to say!

Is this that I cannot get decimated arrays as I want ??

And I think so for my purpose the mark code wouldnot help!

I am actually unable to understand what you said! have you understood my actual point? maybe I am not able to convey it or have I?

Thanks

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Are you doing anything with the data between the interpolating and decimating other than sending it to the FPGA?  If not, I wouldn't bother interpolating.  Either send them separately or just append.

 

But here's a caviat.  The FPGA has to have fixed length arrays.  So on your RT side, you need to set your arrays to the proper length before sending them down.  This is where Mark's code will come in handy.


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I am dealing with FPGA!

interleaving my data at RT side and sending to FPGA by decimating

But what if we donot know our array size because  I am giving an angle to my motor that uses spline interpolation to reach its position! interpolates point and feed to fpga continousally!

So with every time we change angle array size would be changed! as the interpolated points will be different each time the angle is different!

So does that mean that we cannot do this?

 

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