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fpga to PC transfer of data

I have a working FPGA program that will via a FIFO send the data back so I can graph it on my PC. I understand however that this data

is not in fact on my PC but on the RIO processor. Somebody told me a few months back that maybe you had to TCP it if you want the data

on your PC so you can further process it. Is there a prefered method? Two loops and a Queue maybe? What I have in mind is aquiring the data

on the FPGA and pre-processing it and then sending it to the host (Rio processor via FIFO) and from there to the PC for final processing ie 3 layers.

Does this make sense?

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Are you using an FPGA card in your PC, or a compact RIO device?  If you have a cRIO connected over ethernet, then you will need to choose a communication mechanism for transferring data from the cRIO to the PC.  It is common to do the initial acquisition on the FPGA, some processing on the cRIO, and the final processing, logging and display on the PC.  I'm not sure what you mean by "two loops and a queue" without specifying where you expect those loops to run.  You may find this article helpful as a starting point: Using the Right Networking Protocol.

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