fpga pid limited by 8bits resolution

[Nolle]

Hi, I am using LV9 and FPGA PID.  Problem I have is the accuracy for the I and D settings, as we only have 8 bit resolution, i.e. 0.004.

 In our application, we need to finetune the PID-loop with finer adjustments than 0.004 steps, for instance I-values of 0.0002, 0.0003 and so on.

Anyone has a solution ?

[majoris]

What FPGA are you using? My understanding is that most of them have 16 bit analog inputs and outputs, meaning a 16-bit PID loop should be possible to create! Maybe I am not aware of all the FPGAs available though.

[nathand]

Sometimes it's a good idea to read what the poster asked (I know, I reply too fast too sometimes)... the question is about the PID GAINS, not the outputs.  I assume here you're asking about the FPGA-specific PID.   Are you referring to the limits of the normalized gain?  The FPGA PID loop uses 16-bit fixed precision values, with 8 bits for the integer portion and 8 bits for the fractional portion.

You can reimplement the PID function with the precision you need, if resolution is more important than speed.  You might be to scale the PID inputs and outputs, if you don't need the full 16-bit range of the inputs and outputs.  You'll need to work through the normalization math, or set up a quick test (do this with the VI running in simulation), to see if scaling will get you what you need.

[ignis]

I'm having the same problem! I'm doing a load control with a cRIO and using the FPGA PID express vi to control the proccess. The thing is that the PID gains resolution is too low. Using the lowest values of P and I (0.0039) the system gets unstable 😞

The input range I'm using for the SP and PV is +- 50 000 Newtons, and I'm using the max otput values, +65334 and -65336 in order to use the whole output scale. After, I scale this output values to <20,-5> FXP data type, which is the one NI 9220 Analog Output card uses. So, if I want to use a bigger resolution of the PID gains, how should I do?

Thanks in advance!!

[Thoric]

As nathand points out, and as indeed I often implement, you can create customised PID routines from the NI provided PID routines that use your own precision. I often create fixed-point PID algorithms that use up to 64 bits of resolution for fine control, and although this clearly uses more FPGA fabric, it can sometimes be unavoidable. You need to create your own code, using the exist PID routines as templates.

[ignis]

So no way of avoiding a custome PID... OK thanks for your reply Thoric!

[ignis]

Just a final doubt... I have been searching for the PID routines you mentioned and I don´t understand what you mean.

Do you mean a specific example like "Using Discrete PID-cRIO.lvproj" or you mean creating the whole PID code with the FPGA math library?? Exploring example's code, I have seen that the same express PID vi is used, so that's not helpful at all...

Thanks again!

[Thoric]

The PID implementations you have access to will depend on the actual release of the FPGA Module you have (I think - I've seen many variations over the years and I believe that's due to changes in the software with each release).

Take the PID control function from the functions palette, open it up, make a copy, and work on customising the copy. I think you'll find that the PID routines take FXP inputs, then internally convert to integers, perform the control, then convert back to FXP. You can carry the FXP datatype right through the control code, maintaining your desired accuracy. Make sure not to change any of the provided VIs!

Personally I just write my own PID control routines from scratch, perhaps looking into the NI provided functions for a bit of guidance here and there occasionally.