Click on the Help in the same page. If you have any specific questions, please let me know. Here is the link:
General Page (FIFO Properties Dialog Box)
Here is the explanation:
Flip-Flops—Stores the data in flip-flops available on the FPGA and provides the fastest performance. National Instruments recommends using this option for small FIFOs, up to 100 bytes. You cannot use FIFOs with an Implementation of Flip-Flops or Look-Up Table across multiple clock domains.
Block Memory—Stores the data using embedded blocks of memory. Xilinx literature describes this implementation as block RAM or BRAM. National Instruments recommends using this option for FIFOs larger than 300 bytes. If you select the Block Memory option, you might not be able to read data in a target-scoped FIFO or VI-defined FIFO until up to six clock cycles after you write the data to the FIFO. Use the Timed Out? output of the FIFO Method Node configured with the Read or Write method to determine when the data is ready.