counter reseting after particular number is reached

[Vamsi006]

Hi,

I need a counter which will count from 1 to 20. It should reset at 20 and again start from 1 again. Can any one help me in this.

Also I need how to interface the labview simulation with real time clock. I mean span of 1 iteration in my simulation should be 1 second.

Thanks.

[Vamsi006]

Hi,

I need a counter which will count from 1 to 20. It should reset at 20 and again start from 1 again. Can any one help me in this.

Also I need how to interface the labview simulation with real time clock. I mean span of 1 iteration in my simulation should be 1 second.

Thanks.

[cubz]

Hi, here is how I would do the count:

Regarding the real time clock, do you mean a physical hardware called so?

[Bob_Schor]

The Remainder function is your friend, as is the Feedback node.  Each time this piece of code is called, it will report the next higher count.  Make it a sub-VI called "Count 1 to 20" with the Count 1 to 20 as its output and you are done.

P.S. -- I really didn't "get" Feedback Nodes, and still don't use them very often, but for something like this, they are ideal!

Bob Schor

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@Vamsi006 wrote:

Hi,

I need a counter which will count from 1 to 20. It should reset at 20 and again start from 1 again. Can any one help me in this.

Also I need how to interface the labview simulation with real time clock. I mean span of 1 iteration in my simulation should be 1 second.

Thanks.

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[Bob_Schor]

Hi,

I need a counter which will count from 1 to 20. It should reset at 20 and again start from 1 again. Can any one help me in this.

Also I need how to interface the labview simulation with real time clock. I mean span of 1 iteration in my simulation should be 1 second.

Thanks.

[crossrulz]

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@Bob_Schor wrote:

The Remainder function is your friend, as is the Feedback node.

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In a normal application, use the Quotient & Remainder.  It is the easiest code to understand.  When going to FPGA, do the normal comparison and a Select function.  The Q&R is really expensive in an FPGA.