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compilation error

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Hi Sara

 

I downloaded your project and successfully compiled it without changing anything. What version of LabVIEW and LabVIEW FPGA and you using? 

 

Many thanks 

 

Dan.H

NIUK

AE

Daniel Harryman MEng
CLA, CPI
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Message 11 of 24
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Hey

I am using labview 2012, Pic is attached nd info of fpga is also in the pic. plz have a look!

though on my machine labview 2011 is also installed by I am using 2012 for sure!

Thanks

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Message 12 of 24
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Hi Sara

 

Would you mind trying to compile this on our FPGA cloud compiler? You can get a 30 day trial on this site:

 

https://lumen.ni.com/nicif/us/requestaccess/content.xhtml

 

If you're happy to try this please try compiling your code using the cloud compiler and not the local compiler.

 

Many thanks 

 

Dan.H

Daniel Harryman MEng
CLA, CPI
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Message 13 of 24
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I tried it on somebodys else laptop and it was within the capacity!!

I am now reinstalling the labview on my laptop to see if it works!

I will then give you update after running the reduced code that if its working fine in reduced form!!

Thanks alot!

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Message 14 of 24
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Hi Sara 

 

Just make sure your versions of LabVIEW, LabVIEW real time, LabVIEW FPGA, NI RIO drivers and the Xilinx Compile tools are all the same as the other laptop you tried it on first. Great to hear we got something working though. 

 

Many thanks 

 

Dan.H

Daniel Harryman MEng
CLA, CPI
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Message 15 of 24
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Hello

The code is successfully compiled on new machine. I have made a little change in the data type  on fpga side from FXP to int32(also using int16 in between)! Its because I tested the joint split function concept of 4 numbers on a blank VI and it was fine if we keep the types like I have kept right now! but if we change it to FXP it doesnot give the right for all four numbers! keeping that in view I have changed the types!

My project is also attached!

Now the only little issue is that I have to go to fpga VI to press the enable drive button form there for motors to move! that makes no sense because RT is theuser panel! But when I enter angles after that i have to press enable from Fpga side!

However to avoid that I tried to give seperate enable to all drives, if only it could solve the problem, but at the end of compilation it gave me voilation error!!

So whats the solution of this problem!!

Another thing I wanted to ask is what major change you made in code?? was it in the spline subVIs that was locked for me?? Because I would be needing to add fifth motor later on too!

Thanks alot!

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Message 16 of 24
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TEST OF JOINT SPLIT CONCEPT!

 

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Message 17 of 24
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another observation is that the motors work only if we give one rotation and one pivot angles non-zero! So that means if I am giving my pivots zero and rotations some angles it wont work, same for vice versa!  Why is it behaving like this??

P.S: sorry for multiple messages!

Thanks

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Message 18 of 24
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Hey

Problem of giving 1R and 1P for working of motors is solved. now we can give any one an angle and it wud work!I made some logic changes on RT side

The only question left is now about the enabling of drive from fpga side!

How to avoid that??

And another of what major changes you have made to reduce space! is it any change in locked VIs!

Thanks alot for your constant support!

Sara

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Message 19 of 24
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Enabale drive problem is also solved ! made change in fpga code! seperate enables, clear faults for all motors!! although its occuping 1.5% more space after all additions I have made, now its 95-96% almost.

Now the only question left is about the main changes you have made what are they to reduce the space!?because when I compiled the code given by you, it asked me do you want to save changes made in spline interpolation VI(the built in function)? So did you unlock them and made changes?? So that later on if I would be needing to add fifth motor I can!

Thanks alot

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Message 20 of 24
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