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When I use the internal counter output as the AI sampe clock source, it prompts it is invalid

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I am a new leaner ofLabView. When I want to collect on the falling edge of the stimulus signal, I take into account the retriggerable function of the counter, but when I use the internal output of the counter as the AI sampling clock input source, it shows that the sampling clock source is invalid.why? thank you for you reply.捕获.PNG



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Message 1 of 7

Sorry, I cannot read any of the non-English characters.


The most important thing I see is that you stop the CO task immediately after starting it. You should use dataflow to make sure you don't stop the CO task until after your AI read loop is done.  Beyond that, there must be some other (probably little) problem leading to your error


- what device are you using?  Or is  there more than one?


- Is your CO task set for "Implicit" timing?  If not, *that* might be the source of your error


- similarly, is your AI task set for "Sample Clock" based timing?


- have you probed the output of that helper function that's supposed to create a terminal name related to Ctr0InternalOutput?   Have you tried (at least temporarily) to wire a direct terminal constant like "/Dev1/Ctr0InternalOutput"?


- I can't tell which tasks are set for Finite vs Continuous Sampling


- You don't specify the # samples to read in your AI read loop.  The default behavior will depend on Finite (wait until all samples collected and then return them all.  2nd iteration will produce an error) vs Continuous (immediately return whatever's available right now, many if not all iterations will return nothing while waiting for the retriggered CO task that you immediately stopped)



-Kevin P

Message 2 of 7

Thanks for your answer, I converted the program to the English version and modified it. But there are still problems.
The equipment I use is cDAQ9178, a NI9236, and a NI9269.
I use the sample program to output a square wave through 9269 and then connect to PFI0.
But this does not work.
Thanks again.







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Message 3 of 7
Accepted by topic author renfeix

Thanks for the translation.  I was puzzled at first because the code looked fine.  But then I looked up your 9236 device and realized that it's a special case.


It uses a Delta-Sigma A/D converter which relies on deriving its own sample clock from its own internal timebase.  Such devices (in my experience at least) *never* support the use of a direct external sample clock signal.


Some (many?  most?  all?) would allow you to provide an external *timebase* signal, which it would then divide down to derive its own slower sample clock.  But you can't feed them a sample clock signal directly.


You can often (usually?  always?) *export* the resulting sample clock *out* of a Delta-Sigma device so that other tasks can sync their timing to it when needed.


I don't know your overall app needs, but the best approach will likely be to try to export the sample clock out of the 9236 and let other tasks sync to it.  



-Kevin P

Message 4 of 7

Thanks for your reply。

there are some errors in my input, it should be 9239, not 9236. But I think the reason is the same.

In fact, I want to use the 9239 acquisition module for multiple acquisitions on every falling edge of the signal output by my output module.

Besides using the re-triggerable function, do you have any other ideas or ideas?

Thank you very very much for your help.

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Message 5 of 7
Accepted by topic author renfeix

Can you give a (much) more detailed description of your app requirements?


I'm assuming that your hardware doesn't support retriggering natively, hence the attempted workaround with a counter task.  Is that correct?  I have pretty limited knowledge / experience with cDAQ systems.


One approach that can sometimes work is to do continuous acquisition of both your real signal of interest and also your own output signal.  Then you can work out the equivalent of retriggering in a software post-processing stage.



-Kevin P

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Message 6 of 7

  Thanks, I will try the solution you said.
  In detail, my sensor is composed of two parts A and B.

  When I start the program, the analog output module outputs a square wave signal to part A. Due to the law of electromagnetic induction (The electric field in A produces a magnetic field, which produces an electric field in the outer conductor. The electric field of the conductor generates a magnetic field.)

  Part B will sense this magnetic field and generate current. This current signal is the signal I need to collect by the acquisition module. And this signal will only be generated on the falling edge of the signal output to part A. And, after the end of the collection, I need to processing the data to generate an image. I don’t know if my description is clear enough.
  In fact, I want to make the system as intelligent as possible and reduce unnecessary signal acquisition.
  As a novice, I read the device manual repeatedly. It seems that my device only supports importing timebase signals from outside. In fact, I tried a lot of sampling clock sources in the standard example, except for the board's own clock, any external clock is invalid.
  Thank you for your patience and wish you a happy life.

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Message 7 of 7