Updating a CLIP-Node if VHDL-Code changed

[stppnwlf]

Hello,

i was following this Tutorial to integrate a CLIP node in my LabVIEW-Project and it worked so far. 

Now I was editing my VHDL-Code but LabVIEW did not want to recompile my bitfile, so I did a manual rebuild. 

Is this the standard procedure if the vhdl code changed?

Best regards,

Tobi

[AmyNK]

Hey Tobi,

By manual rebuild do you mean of the LabVIEW FPGA code?

I have done a bit of digging, and yes this should be the standard procedure, because the bitfile is created when LabVIEW is compiled (the bitfile describes how to configure the FPGA circuit). This means if something changes,  LabVIEW must be recompiled, to create a new bitfile. LabVIEW won't acknowlege a behind the scenes (ie in VHDL) change, until either it has been rebuilt, so it won't automatically "want" to recompile, because it won't have noticed a change.

Hope this helps, and you managed to get it working ok!