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Unexplained Coercion Dots

First, on LV 8.2, I don't get any coercion dots.
 
However, i did notice something interesting. If you turn on context help and hover over one of the U8 array wires, you'll see the data type is "1-D fixed-size array [5] of..." Each array coming from the build array nodes has a different, fixed size. The coercion dots you see could be from trying to coerce the arrays to a size of 5, which is why you don't see one on the build array with 5 inputs. Each array I see has a different size, so there is no coercion. This would explain why you can't add or delete items from these arrays.
 
I didn't know LV could do fixed-size arrays, but apparently you made them. If I create a constant by right clicking one of the wires, it creates another fixed-size array from which I can't add or remove items.
Message 11 of 16
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Well, after a search I found references to inherently fixed size arrays in LV. This data type is used in the FPGA module:

Arrays in the LabVIEW FPGA Module Arrays can be created with the LabVIEW FPGA Module; however, you can only use fixed-size, one dimensional arrays. You can make any array constant, control, or indicator fixed-size, by right-clicking on the array index and selecting Set Dimension Size.

quoted from http://zone.ni.com/devzone/cda/tut/p/id/3738

Indeed, if you right-click on the array constants in the original vi, you will see the new Set Dimension Size menu item.
I guess that some code was copied and pasted from a FPGA vi to a standard LV vi, retaining the added features.

Paolo
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LV 7.1, 2011, 2017, 2019, 2021
Message 12 of 16
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Good catch. Smiley Happy
I was about to call this a bug because of the editing issues with the arrays.

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Message 13 of 16
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It wasn't cut-n-paste from an FPGA VI. Historically, it WAS cut from another Windows based VI.

I've just noticed that when I place a new Build Array function, the default fixed-size array output appears to be of size one. I don't know how these other examples managed to get a default size of 5.

 

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Message 14 of 16
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I think Pincpanter was refering to some of the source code of LabVIEW.exe for FPGA that was copied to the normal version, not the actual labview code that has the bug.


Anyway, I could reproduce this without even having the FPGA module installed. So it is a bug. Since using a Type Cast on a U8 does the same trick, it's not a real problem though.


Has anyone checked if the coercion dot effects the expected output?


Regards,


Wiebe.
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Message 15 of 16
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My code does what I'd expect. I've also tried a couple of other experiments, like creating indicators off the Build Array. So, I'm happy that the results are unaffected.
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Message 16 of 16
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