SubVI on FPGA

[Joox21]

Hi all,

I'm working in an LV cRIO FPGA application to generate PWM/Pulses on multiple output channels my code consists on a state machind controlled by different input variables (bool, fxp). The software is working for 1 channel  and i decided to convert to subVI so i just have to call a subVI fro each output channel (from the Top-Level).

Here the software doesnt work anymore. I have read in the forum that the standart variables are just sent when the subVI is called and then updated when the subVI finishes (like a function call in C programming) and that the solution is to use global variables. Is there any other way to do it more hardware-like? I mean that the variables are updated in the Top-Level, are also updated inside the subVI, (without using global variables.)  I'd be grateful if you can point me some example.

Thank You!

subVi call

subVI code

[Duffy2007]

Hello Joox21,

you can look into this Pulse Width Modulation Example DAQ Personality.

The trick is to made the while loop outside so you can access every value you want over local variables in the top level FPGA vi.

[Joox21]

Hi Alex,

yeah, that was my initial solution, one loop (state machine) beside the other in the TOP level and just minor functions (combinational logic) inside the subVI.

Thank You

BBRR

JC