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Steps in deploying final program

Apologies Brian,

 

I have now attached the picture and will look into your other queries.

 

Regards

David B
Applications Engineer
National Instruments UK
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Message 21 of 36
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It makes sense that the program would need to see the fpga bit file in order to run. The first thing it does is connect to it. Hopefully you will get better results by adding a directory called FPGA Bitfiles and adding the file I attached previously. 

 

Are you going to try to create a stand alone from this?

 

Brian

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Message 22 of 36
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Having looked through the project it seems that there should be no issue creating a standalone executable. I will try and create an executable once I can run the project in LabVIEW on my computer. At the moment I still cannot run it and am not able to go through the entire project to figure where parts are missing due to the size of the project. Have you managed to look through the error print screen that I attached and figure out where the missing files are?

 

Regards

 

David B
Applications Engineer
National Instruments UK
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Message 23 of 36
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I think it might be easier to back up a bit. This project compiles and runs fine in my development environment.  I just created a copy of the project, tested it and then zipped it into a single file. I then created a Yahoo mail account and sent this file to it (Yahoo accepts attachments up to ~ 20 MB).

 

If you go to https://login.yahoo.com/config/login_verify2?&.src=ym and login as brianthermofisher@yahoo.com using the password myproject you will find my email with the attachment. You should be able to to unzip it into its own directory and then open and run the project as is, though you may not get too far if you don't have the exact hardware that I am using. Speaking of which, could this explain some of the other issues you are seeing?

 

Thanks,

Brian

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Message 24 of 36
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Hi Brian,

 

Sorry for the delayed reply I have been away from my PC much of the day.

 

Some of my errors will be due to not having the same hardware but there will also be errors that are not due to this as otherwise you would be ok running it on your target. Thank you for sending me the project, obviously the project itself is fine as it runs on your original PC. Could you please let me know exactly which hardware you are using and all of the drivers that you have installed on the target PC?

 

Regards

 

David B
Applications Engineer
National Instruments UK
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Message 25 of 36
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Hi David,

 

My system has a compactRIO attached to it with the modules listed in the project. The target system is running Windows XP SP3 and has the LVRTE2010sp1std engine from your web site loaded on to it. How would I go about adding other drivers to it?

 

Thanks,

Brian

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Message 26 of 36
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Hi Brain,

 

I think that one problem is that you have not got a compactRIO driver installed. This is needed for projects where you are using a compactRIO, it can be downloaded from the support section on ni.com. This should solve some of the erros but due to the amount that there are it is hard to say whether it is the complete solution. If there are still more problems I think it will be very difficult to solve them purely over the forums. Do you have a Standard Service Program? If so then an Engineer may be of more use solving your problem over the phone.

 

Regards

 

David B
Applications Engineer
National Instruments UK
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Message 27 of 36
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Hey

 

Just my two cent.

There is one big problem with your setup. You CAN'T have a reference to the FPGA in a cRIO system on the PC side. There are NO direct link to the FPGA from the PC.

You need to have a vi runing on the controller to communicate to the FPGA. At the moment you only have vi's for the FPGA, but none for the embedded controller.

 

Try to go through this:

http://www.ni.com/compactriodevguide/

 

That will help you setup you project correct.

 

 

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Message 28 of 36
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Thanks for the suggestion dkfire.

 

Unfortunately the instructions in the compactriodevguide do not seem to speak directly to my configuration. My project uses VIs written for the PC that communicate as required directly to the FPGA VI. The project also uses  Shared variables but only between VIs on the PC side. When I look at the Build Specifications for the Chassis there is nothing to build (I suspect that this is due to the fact that I have no code in that segment of the project). I have created Build Specs for the FPGA but I don't see where it should fit in to the overall project. Something I noticed when I set up the Build Spec to begin with was that the FPGA was not mentioned anywhere.

 

My problem as this point seems to be that I can create a .exe from the PC VI side and I can created a Build Spec selecting the bit file for the VI that I want on the FPGA side but I don't see anything connecting the two.

 

Brian

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Message 29 of 36
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@brian_d wrote:

Thanks for the suggestion dkfire.

 

Unfortunately the instructions in the compactriodevguide do not seem to speak directly to my configuration. My project uses VIs written for the PC that communicate as required directly to the FPGA VI. ...

 

My problem as this point seems to be that I can create a .exe from the PC VI side and I can created a Build Spec selecting the bit file for the VI that I want on the FPGA side but I don't see anything connecting the two.

 

Brian


That is, as far as I know, NOT possible to do. The only one who can run a FPGA bit file, is a VI in the controller in the cRIO.

The PC has no direct connection to the FPGA code.

A cRIO is design to be a standalone system, It doesn't need a connection to a PC to run.

Try to make a small vi in the controller that starts the FPGA, reads signals from the FPGA and send those to the PC vi.

The developer guide shows you a standard project configuration of a cRIO. It is a minimum setup. It also shows you the link between the PC, the embedded controller and the FPGA.

Maybe you can setup the scan engine so that all the reading a available on the net through Shared Varaibles, but I think you still need a VI in the controller to start the FPGA.

 

By the way, why are you only having code in the FPGA ? Is there a special need for FPGA ?

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