Starting project, need help to decide between RT or FPGA (Or Hybrid)

[lagunasol]

I know that this is something that has been asked many times, but I am not sure of which one to choose for my project, or if I should do a hybrid system. What I need to do is take samples at a minimum speed of 1us, then those samples evaluate them with a PID algorithm, and after that choose a decision for an output signal. The whole process should be made within 10 us (I still have to consider the required time for extra code tho).

My problem is the speed, I am sure this may be (or should be) done in FPGA because the need for a fast reaction, but there are equations using complex numbers and that might be a problem on FPGA (like arcSine and arcCosine functions) unless there is a way to do a Numeric Method of Newton Raphson on FPGA within that time spam and have an aproximated result (I was searching for a Newton Raphson method on FPGA but couldn't find one yet). 

The hardware to be used is a Compact RIO 9074, adquisition modules 9215, 9227 and output modules of 9263 or 9274 (I say "or", because I would also like to have a recomendation between digital output or an analog output, has to be at least of 5V)

I've been told that the RT module of the Compaq Rio has a speed of 400MHz? but that is only for process right? the scan speed is just 1kHz? if that is right, then the proper way to do programation should be using FPGA and a Host PC? 

I also ask all this to know which course should I be checking (Real time 1 and  2 or FPGA)

Thanks

[GerdW]

Hi lagunasol,

- at that speed (100kHz to 1MHz) you need to use the FPGA for your control algorithm.

- you can do SIN and COS on the FPGA by using precomputed tables. Do some search (either in the example finder or on the NI website) to find some AppNotes or example VIs…

- when choosing modules you need to read their specs. They have to support your sampling rates!

- when choosing your output module (AO or DO) you need to know what kind of signal you need! Outputting 5V on a AO module to simulate TTL logic may work, but using a DO for this task might be much easier…

- The CPU of the RT host is clocked at 400MHz. This is (more or less) meaningless according to your problem. The scan engine is limited to ~1kHz for a small number of in/out channels.

- you should use the FPGA for the fast control and the RT host for all low speed tasks (like configuration, logging, networking, etc.)! The PC connected to your cRIO will even be slower than your cRIO because you can only access the cRIO using network functions…