Split read data from FIFO LABVIEW FPGA

[Cobmetal]

Hi ,

im implementing some code on the FlexRio to communicate with an external device.

im reading data from FIFO (target) to one of the I/O ports on the adapter.

i want to monitor that data and read it using the DMA at host side.

what i've done is split the wire from the fifo output to the I/O port and the DMA .

when im trying to read from DMA , at the host side , it seems that there is no data at at all.

picture included.

[James_Battleaxe]

Hey,

I looked at the screenshot you provided and I'm wondering where you're writing data to the Target FIFO. I see that you're trying to read data out of that buffer, but if you're not seeing any data out of that buffer, I think it's worth tracing the data back to the source. There could be issues on the side writing data into the Target FIFO.