Remove or Hide Default Feedback Node in LabVIEW FPGA

[troy.perales]

Is there any way to remove or hide the feedback node when wiring an output of a sub VI to another VI that eventually leads to the input of the same sub VI?

I've tried embedding the feedback node in the sub-vi, just so that it won't appear on the top-level VI, but LabVIEW automatically adds a feedback node regardless.

[Dennis_Knutson]

Why would you want to hide it? It's part of your code and I don't see the point of hiding code. It would just make it harder for someone to debug it. You can change it to a shift register if you prefer the looks of that.

[troy.perales]

Technically, it's not always part of the code.

I created HDL nodes and hooked them up outside of any loop in such a way where feedback is involved. I've ran the VI in this manner and used an oscilloscope to check for a clock delay due to the feedback node. However, the only delay I can account for is a small gate delay nowhere near 20 ns. (I'm using the Spartan 3E Starter Board with an onboard clock of 50 MHz).

Essentially, the feedback node is assumed as a wire in this case. I would like to remove or hide it since it's not really intuitive to a lab full of digital logic students that I would be teaching.

[Dennis_Knutson]

Missed the fact that this was for FPGA. If it's just the image of the feedback node itself, you could create an image of a solid wire and paste it onto the block diagram.

[troy.perales]

While that would be great for a screenshot, I'm trying to avoid the feedback node from showing up altogether when wiring in the top-level block diagram, since that is what the students will be doing.

Thanks for the suggestion though.

[troy.perales]

Just in case anybody was interested, I just confirmed with NI that there is no way to remove or hide the top-level feedback nodes that appear by default for the case written above as of LabVIEW FPGA 8.5.1.