Programmatically defineing which DMA FIFO to be accessed in Real Time

[MaxJoseph]

Hi all,

I am trying to write a generic DMA FIFO polling vi that uses a reference to select the appropriate DMA FIFO object to read. Normally I would generate a reference to an object and select the method from the drop down menu. I can create a FPGA reference constant that contains only the reference to the FIFO I want. But when I wire this to an FPGA invoke node the node requires specific configuration; it isn't generic like typical invoke nodes which operate on classes of objects.

Does anyone know how I can programmatically define which DMA FIFO a FPGA invoke node reads from?

Thanks!

[nathand]

You can use the FPGA Advanced Session Resources to do this. You pass in your FPGA reference and the name of the FIFO you want to access, and what you get out is an FPGA reference containing a FIFO named "FIFO" that actually referred to the FIFO you named. Follow the instructions carefully - you need to provide an FPGA reference (for type information only) containing a FIFO named "FIFO" with the correct type of data.

[MaxJoseph]

Many thanks for the tip nathand!

I will look into FPGA advanced session resources and let you know how it goes. I assume that when I do the read/write control operation on the DMA FIFO object that it will just read the most recent item in the buffer.

I am very hopeful that this will rescue my implementation!

[MaxJoseph]

Hi,

I have had a go at implementing the Advanced Session. The example on the page you provided seems to show a cluster (called Value) of several items being written using the read/write control function. I want to read from the DMA FIFO and so I understood from the example that I have to be sure to cast the FPGA vi refnum into the right type (i.e. a member of 'FIFOs' called 'FIFO').

I have hit a couple of problems with this; it would be great if you could help me out!

1) To make a FPGA vi refnum that looks like the one shown in fig 7 of your example, I have to create a FIFO object in my project called FIFO. Otherwise when I configure the refnum using the vi, there is no appropriately named item. I cannot see how to rename items like in example implies might be possible.

2) I then wire in the correct name of the FIFO I want to access (e.g. Wave), the full FPGA vi refnum and the refnum constant into the GetSingleResourceName. When I wire the result of the GetSingleResourceName function to the read/write control function the function tooltip says there is 'no selection/control available'. This is not the case if I do the above with a control item called 'Value'. To try to work around this I replaced the read/write control with a FIFO read invoke node. The invoke node was configured to perform FIFO.read. This did not work when I tried to test the system with two differently named FIFOs, returning an error of 'same FIFO being accessed by two callers' indicating that the FPGA vi refnum is not appropriately defining the DMA FIFO resource that I want to be accessed.

[nathand]

Can you share any of your code, so I can see exactly what you're doing?

The easiest way to create the FPGA Dynamic Refnum with a FIFO named "FIFO" is to temporarily rename one of the FIFOs in your project to "FIFO" then create a dynamic reference to any FPGA VI in the project, delete everything except that FIFO, and save the dynamic reference (as a type definition, or at least as a constant somewhere on a block diagram). After that you can rename the FIFO back to its original name, or close your project and FPGA VIs without saving (other than to save the dynamic reference, of course).

I think I'd have to see your code to understand your second issue. I'm using this approach successfully - I have three serial ports that are handled through the FPGA, with 2 FIFOs for each one (one in each direction, transmit and receive) and I can pass in the FPGA reference and the names of the FIFOs to select one serial port, and the serial port driver doesn't need to know anything about the specific FPGA VI so long as those FIFOs exist.

[MaxJoseph]

Hi Nathand,

I have attached a few figures showing my code to help illustrate the situation.

Here is a synopsis of the code:

The FPGA has two counters, one increments and one decrements. I make 4 16 bit samples and join them to 1 64 bit sample which is put into the FIFO at a rate of 10 MHz.

The RT has four FIFO reads. The first two are supposed to be generic and use strings to identify the FIFOs I want to read from. This is close to what I want to do eventually in the program; use a parental read function to read all the FIFOs in parallel and write them somewhere else as appropriate.

The second two are specific and are manually assigned to the correct FIFO. I get an error that complains that I am trying to do simultaneous reads from 'FIFO' when I run this program. When I comment out the generic reads, the program functions perfectly. When I comment out the specific reads and one of the generic reads, the program errors in the same way.

I don't seem to be able to use the generic read function at all due to this error.

[nathand]

This error seems completely reasonable - you can't have two sessions reading from the same FIFO. There's a fundamental problem with your code if you're trying to read the same FIFO in parallel in multiple locations, because you can only dequeue an element from a FIFO once. Parallel reads, if allowed, wouldn't result in the same data at each read; instead, you'd get some of the data at one read and the rest of the data at the other read.

If you need help figuring out how to restructure your code, can you provide a better explanation of what you actually want to do?

[MaxJoseph]

Hi,

I still get the error when I comment out the bottom three FIFO reads. IE the code is only make a single read from the FIFO called FIFO.

I want to make multiple parallel calls to different FIFOs. I want to use preallocated clones on a single vi to perform these calls. I wish to programmatically select which FIFO each instance calls in some way. Each instance will call a unique FIFO so no single FIFO will ever be called simultaneously by 2 or more instances.

The overall aim is to use OOP to simplify the use of many FIFOs (generic references) and optimise the FIFO read speed of my RT system (parallel calls).

Many thanks for your help!

[nathand · Accepted solution]

Remove the FIFO named "FIFO" from your project, since you're not actually using it. You only needed it to create the constant that you wired into the session resources function; it shouldn't remain part of the ptoject. You might need to recompile the FPGA VI after that to remove it from the bitfile. I wonder if the error is due to you having the FIFO named "FIFO" conflicting with the renamed FIFO from the session resources.

[MaxJoseph]

Hi,

I have got it working!

I referred to this thread, which had a helpful figure in.

The problem appears to have been that I had the GetResourceByName inside the loop. This node needs to be outside of the loop.

Many thanks!