Hello, it's time for another episode of "I have no idea why they hired me to do LabVIEW programming when my clear lifeskill is underwater basketweaving". I'm your host, Elizabeth_Rose.
I have a FlexRIO PXIe-7962 FPGA and a PXIe-5783 adapter module. I also have a PXIe-5654 signal generator, whose 10 MHz REF OUT clock I have connected to the CLK / REF IN port of the 5783.
The idea is for the 7962 FPGA to generate two 20 MHz sinusoid waves (90 degrees apart, I think, to be fed into an I/Q mixer later), which I would then phase lock to the 10 MHz clock signal from the RFSG. The frequency of these waves would remain constant at 20 MHz, but the amplitude and phase after the mixing would be determined by the user.
I'm very at a loss for how to begin. I looked at the built-in example provided for the 7962 for sine wave generation, and was able to successfully compile it and get it to run...but that only seems to produce two virtual sine waves on the UI graph, it doesn't appear to actually output a physical analog signal. (If it did, it would be a fantastic place to start, I think, but I don't really understand how to make those signals physical).
I also looked at this example of an FPGA-based PLL VI (for a myRIO) https://decibel.ni.com/content/docs/DOC-36353 The video was very informative, but I don't seem to have the same simple analog outputs he has in his project on my FPGA (probably because it's a FlexRIO and not a MyRIO), and I don't really understand what he's locking to anyway.
I'm attaching a photo of the electronics flow diagram, in case that helps. Any asisstance would be very greatly appreciated.
I think you may have a larger issue in that the PXIe-7962 FPGA does not support the NI 5783 Adapter Module. The NI 5783 requires a Kintex-7 FPGA module while the PXIe-7962 has a Virtex-5 FPGA module.
Well that was a minor heart attack if I've ever had one...
Turns out the documentation I was given (precious little as it is) was wrong. We didn't order a 7962, we ordered a 7972R, which thankfully is compatible. Thank you for pointing that out.
Have you had a chance to look at the adapter module specific examples in the Example Finder? The examples can be found under Hardware Input and Output»FlexRIO.
Yes, as I said in the original post, I had been working with what I believe is the most relevant example, but even if I could get it to output physical signal (which I haven't figured out yet), I'm not sure how to then adapt that to lock to the 10 MHz external clock from my signal generator.