Please also find attached the FPGA VI.
Could you please provide any suggestion?
with the code you have implemented you cannot have the passing of data you want in your host PC.
You have to insert your network stream writer in the consumer loop, so once you do the dequeue of the elements, you have to pass them to the writer.
Please be careful that you have to set the correct dimention of the network strem (1000 if you want 1000 samples).
I hope it is a little bit clearer now.
PS: the demo you did is ok for passing data between two parallel loops, but you have to insert this code in the one you did yesterday.
I'd like to help you, but I don't have time (and you are not paying me enough!) to take the pictures you posted and, by hand, attempt to re-create your code so that I can (a) rearrange it to make sense to me, (b) test it, (c) try to improve it, and (d) test my changes. It is also much easier for you to simply attach the VI, rather than take a screen shot, save the image, and then post the image.
The demo code does not seem to work as expected.
I want to process 1000 samples everytime and check if all the elements are greater than the threshold, in this case use Network Streams for communication purposes I also noted that once I Dequeue the element by setting the Queue dimensions as mentioned in the snapshot I do not get the number of elements as mentioned in the Queue dimension . I think I am missing out on something.
My ultimate aim is to send data to PC in form of frames , say valid frames such that each frame consists of 1000 data data points and the amplitude of values in these frame are greater than the set threshold value.
I am not currently at my workstation would send the VI as an attachment by tomorrow.
I have attached a very simple VI which I am trying to implement seperately. In this VI I am trying to process 20 samples and check if each value is greater than the threshold , in such case transmit the frame consisting of the valid 20 elements using Network Streams. I am unable to implement the network Stream logic on this VI. If I am able to implement this logic successfully I will integrate it with the main VI.
I have enclosed this VI for simplicity purpose and it would be implemented on the cRIO.
I would be really thankful, if you could suggest if this is the right approach and also provide suggestion as to how to use Network Stream in this case.
Please let me know if you need any more details.