Hello to everyone that reads this thread,
Please ignore my first post, it doesn't make any sense at all! I
have been working on two different synchronization issues today and
have confused the two. Following is the appropriate response.
Hello QQQ,
I took a look at your code and I don't really see where any sort of
signal is being routed to the RTSI line (even though two boards are
configured to receive a RTSI signal). I have attached a screen
shot of a block diagram that shows how to how to synchronize a finite
analog input and digital pattern input operation (with a 653x device)
in Traditional NI-DAQ. The 653x device acts as the master,
routing its REQ clock to the analog input scan clock over RTSI.
The MIO device uses AI Clock Config.vi to select the RTSI line as the
source of its scan clock. This example should be able to be
modified to accomodate the specific tasks of your particular
application (analog output synchronized with digital output).
Sorry for any confusion I have caused!
Eric
DE For Life!