Parallel FPGA in LabVIEW/Multisim co-simulation

[hacmachdien]

Hi guys, is it possible to put 3 or 4 FPGA modules in a LabVIEW model and then co-simulate with Multisim running 1 plant model? I want to simulate a solar energy converter using multiple parallel FPGA cores (this part in on LabVIEW) driving multiple inverter bridges interacting with the grid (this part is the plant model on Multisim).

[Patrick_P. · Accepted solution]

Hey hacmachdien,

This should be possible.  If you have the Control Design and Simulation toolkit, you can use the Control and Simulation Loop to co-simulate with Multisim after installing the co-simulation plugin that comes with Multisim.  See the white paper here for more information.  

If you encapsulate your LabVIEW FPGA logic inside of a subVI, you should be able to use those subVIs in the Control and Simulation Loop.  There are a few caveats with this.  First, the rate for the LabVIEW FPGA SubVIs will need to be configured according to how they will run in the real hardware.  For example if the subVI is inside of a Single Cycle Timed Loop that is configured for a 40 MHz clock, you will need to configure the period for that subVI to be 25 ns.  You can configure the period by right clicking on a subVI within a Control and Simulation Loop and going to SubVI Node Setup.  From this menu, you can set the execution type to be discrete and then configure the discrete timing.  Another caveat is certain things will not be supported such as I/O.  You can usually work around this by leaving your IO on the top level of your application and just passing the values into the subVI through controls and indicators.  Let us know if you have more questions!

[hacmachdien]

Hi Patrick, thank you for the answer.

After this co-simulation step, can I use those sub VIs (which represent FPGA cores) for deployment on parallel sbRIO 9683 modules? It is important because my solar converter project involves a network of parallel converter controllers (FPGA boards) driving a microgrid.

[Patrick_P.]

Hey hacmachdien,

It should not be a problem to take those subVIs and distribute them across different sbRIO 9683 boards.  Make sure to check your subVIs under the FPGA target before you get too far in your algorithm in simulation because the FPGA targets do have a subset of the palette that is normally available on the desktop.