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PXI-7854R: how many times can bitfile be loaded to FPGA?

How many times can I reload bit file to my FPGA PXI-7854R?

 

I found a related question/answer for 783x but I'd like to know the limitation for PXI-7854R, specifically.

 

PXI-7831R http://digital.ni.com/public.nsf/allkb/91DE0C3B7740C287862574D300646369

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My understanding is that it's basically unlimited, so long as you're loading directly to the FPGA and not to flash. Many of the FPGA boards contain flash memory so that they can load the FPGA when the board is powered on. However, if you're loading the FPGA from the development environment or from an application, it loads directly to the FPGA so there's no wear on the onboard flash memory. Internet searches indicate that programming an FPGA does not cause wear - it's more like RAM (and, like RAM, it loses its configuration on power-off).

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Thank you for comments, .

 

I do use my application to load bit file instead of auto-load on power up.  Can someone point to an NI reference just so I can feel confident?  I use PXI-7854R in production test environment.

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There's this post, which I believe is from an NI employee.

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For additional "you'll never wear it out fodder": we use Xilinx FPGAs, so their documentation will be the real source of the answer.

 

http://forums.xilinx.com/t5/Spartan-Family-FPGAs/How-many-times-I-can-reprogram-my-Spartan-6-device/...

 

and, slightly more entertaining discussion on the matter:

http://forums.xilinx.com/t5/Spartan-Family-FPGAs/How-many-times-can-you-re-program-a-Spartan-device/...

 

I guess it's not really "official documentation", but it's the right answer. I couldn't find anything more substantial in the ~10 minutes I looked.

Cheers!

TJ G
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